/freebsd-10.1-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | LiveIntervalUnion.h | 119 Query(LiveInterval *VReg, LiveIntervalUnion *LIU): argument 120 LiveUnion(LIU), VirtReg(VReg), CheckedFirstInterference(false), 135 void init(unsigned UTag, LiveInterval *VReg, LiveIntervalUnion *LIU) { argument 136 assert(VReg && LIU && "Invalid arguments"); 137 if (UserTag == UTag && VirtReg == VReg && 144 VirtReg = VReg; 162 bool isSeenInterference(LiveInterval *VReg) const;
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H A D | LiveRangeEdit.h | 102 void MRI_NoteNewVirtualRegister(unsigned VReg);
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H A D | MachineRegisterInfo.h | 535 /// getLiveInPhysReg - If VReg is a live-in virtual register, return the 537 unsigned getLiveInPhysReg(unsigned VReg) const;
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/freebsd-10.1-release/contrib/llvm/lib/CodeGen/ |
H A D | LiveIntervalUnion.cpp | 149 LiveInterval *VReg = LiveUnionI.value(); local 150 if (VReg != RecentReg && !isSeenInterference(VReg)) { 151 RecentReg = VReg; 152 InterferingVRegs.push_back(VReg);
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H A D | LiveRangeEdit.cpp | 34 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); local 36 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); 38 LiveInterval &LI = LIS.createEmptyInterval(VReg); 43 unsigned VReg = MRI.createVirtualRegister(MRI.getRegClass(OldReg)); local 45 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg)); 47 return VReg; 399 LiveRangeEdit::MRI_NoteNewVirtualRegister(unsigned VReg) argument 404 NewRegs.push_back(VReg);
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H A D | MachineFunction.cpp | 426 unsigned VReg = MRI.getLiveInVirtReg(PReg); local 427 if (VReg) { 428 assert(MRI.getRegClass(VReg) == RC && "Register class mismatch!"); 429 return VReg; 431 VReg = MRI.createVirtualRegister(RC); 432 MRI.addLiveIn(PReg, VReg); 433 return VReg;
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H A D | TailDuplication.cpp | 231 unsigned VReg = SSAUpdateVRs[i]; local 232 SSAUpdate.Initialize(VReg); 236 MachineInstr *DefMI = MRI->getVRegDef(VReg); 240 SSAUpdate.AddAvailableValue(DefBB, VReg); 245 SSAUpdateVals.find(VReg); 253 MachineRegisterInfo::use_iterator UI = MRI->use_begin(VReg);
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H A D | MachineRegisterInfo.cpp | 350 /// getLiveInPhysReg - If VReg is a live-in virtual register, return the 352 unsigned MachineRegisterInfo::getLiveInPhysReg(unsigned VReg) const { 354 if (I->second == VReg)
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H A D | InlineSpiller.cpp | 182 void insertReload(unsigned VReg, SlotIndex, MachineBasicBlock::iterator MI); 183 void insertSpill(unsigned VReg, bool isKill, MachineBasicBlock::iterator MI); 1013 unsigned VReg =0) { 1030 if (VReg) { 1031 MachineOperand *MO = I->findRegisterDefOperand(VReg);
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H A D | RegAllocFast.cpp | 186 LiveRegMap::iterator assignVirtToPhysReg(unsigned VReg, unsigned PhysReg);
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/freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | InstrEmitter.cpp | 287 unsigned VReg = getDstOfOnlyCopyToRegUse(Op.getNode(), Op.getResNo()); local 290 if (!VReg) { 293 VReg = MRI->createVirtualRegister(RC); 296 TII->get(TargetOpcode::IMPLICIT_DEF), VReg); 297 return VReg; 320 unsigned VReg = getVR(Op, VRBaseMap); local 321 assert(TargetRegisterInfo::isVirtualRegister(VReg) && "Not a vreg?"); 329 // shrink VReg's register class within reason. For example, if VReg == GR32 330 // and II requires a GR32_NOSP, just constrain VReg t [all...] |
H A D | InstrEmitter.h | 84 /// ConstrainForSubReg - Try to constrain VReg to a register class that 87 unsigned ConstrainForSubReg(unsigned VReg, unsigned SubIdx,
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/freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/InstPrinter/ |
H A D | NVPTXInstPrinter.cpp | 69 unsigned VReg = RegNo & 0x0FFFFFFF; local 70 OS << VReg; local
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/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/ |
H A D | Thumb1RegisterInfo.cpp | 561 unsigned VReg = 0; 653 VReg = MF.getRegInfo().createVirtualRegister(&ARM::tGPRRegClass); 658 emitThumbRegPlusImmInReg(MBB, II, dl, VReg, FrameReg, 661 emitLoadConstPool(MBB, II, dl, VReg, 0, Offset); 665 emitThumbRegPlusImmediate(MBB, II, dl, VReg, FrameReg, Offset, TII, 668 MI.getOperand(FIOperandNum).ChangeToRegister(VReg, false, false, true);
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H A D | ARMISelLowering.cpp | 2910 unsigned VReg = MF.addLiveIn(GPRArgRegs[firstRegToSaveIndex], RC); local 2911 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32);
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/freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 2131 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(GPArgRegs[GPRIndex]); local 2132 if (!VReg) 2133 VReg = MF.addLiveIn(GPArgRegs[GPRIndex], &PPC::GPRCRegClass); 2135 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrVT); 2150 unsigned VReg = MF.getRegInfo().getLiveInVirtReg(FPArgRegs[FPRIndex]); local 2151 if (!VReg) 2152 VReg = MF.addLiveIn(FPArgRegs[FPRIndex], &PPC::F8RCRegClass); 2154 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::f64); 2328 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); local 2329 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, PtrV 2366 unsigned VReg; local 2390 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); local 2414 unsigned VReg; local 2437 unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); local 2492 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); local 2660 unsigned VReg; local 2683 unsigned VReg; local 2710 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::GPRCRegClass); local 2724 unsigned VReg = MF.addLiveIn(GPR[GPR_idx], &PPC::G8RCRegClass); local 2751 unsigned VReg; local 2774 unsigned VReg = MF.addLiveIn(VR[VR_idx], &PPC::VRRCRegClass); local 2836 unsigned VReg; local [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 871 unsigned VReg = local 873 RegInfo.addLiveIn(VA.getLocReg(), VReg); 874 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT)); 876 unsigned VReg = local 878 RegInfo.addLiveIn(VA.getLocReg(), VReg); 879 InVals.push_back(DAG.getCopyFromReg(Chain, dl, VReg, RegVT));
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/freebsd-10.1-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1147 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); local 1148 RegInfo.addLiveIn(VA.getLocReg(), VReg); 1149 ArgIn = DAG.getCopyFromReg(Chain, dl, VReg, RegVT); 1200 unsigned VReg = RegInfo.createVirtualRegister(&XCore::GRRegsRegClass); local 1201 RegInfo.addLiveIn(ArgRegs[i], VReg); 1202 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32);
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/freebsd-10.1-release/contrib/llvm/lib/Target/R600/ |
H A D | SIISelLowering.cpp | 1005 // VReg or and SReg. In order to get a more accurate 1336 unsigned VReg = MI->getOperand(0).getReg(); local 1353 MRI.setRegClass(VReg, RC); 1395 SDValue VReg = AMDGPUTargetLowering::CreateLiveInRegister(DAG, RC, Reg, VT); local 1398 cast<RegisterSDNode>(VReg)->getReg(), VT);
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/freebsd-10.1-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 401 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); local 402 MF.getRegInfo().addLiveIn(VA.getLocReg(), VReg); 403 SDValue Arg = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i32); 513 unsigned VReg = RegInfo.createVirtualRegister(&SP::IntRegsRegClass); local 514 MF.getRegInfo().addLiveIn(*CurArgReg, VReg); 515 SDValue Arg = DAG.getCopyFromReg(DAG.getRoot(), dl, VReg, MVT::i32); 564 unsigned VReg = MF.addLiveIn(VA.getLocReg(), local 566 SDValue Arg = DAG.getCopyFromReg(Chain, DL, VReg, VA.getLocVT()); 635 unsigned VReg = MF.addLiveIn(SP::I0 + ArgOffset/8, &SP::I64RegsRegClass); local 636 SDValue VArg = DAG.getCopyFromReg(Chain, DL, VReg, MV [all...] |
/freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 468 unsigned VReg = RegInfo.createVirtualRegister(&MSP430::GR16RegClass); local 469 RegInfo.addLiveIn(VA.getLocReg(), VReg); 470 SDValue ArgValue = DAG.getCopyFromReg(Chain, dl, VReg, RegVT);
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/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 684 unsigned VReg = MRI.createVirtualRegister(RC); local 685 MRI.addLiveIn(VA.getLocReg(), VReg); 686 ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); 735 unsigned VReg = MF.addLiveIn(SystemZ::ArgFPRs[I], local 737 SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f64);
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/freebsd-10.1-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 757 unsigned VReg = MF.getRegInfo().createVirtualRegister(RC); local 758 MF.getRegInfo().addLiveIn(PReg, VReg); 759 return VReg; 3466 unsigned VReg = addLiveIn(MF, ArgReg, RC); local 3470 SDValue Store = DAG.getStore(Chain, DL, DAG.getRegister(VReg, RegTy),
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/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1079 unsigned VReg = MF.addLiveIn(AArch64ArgRegs[i], &AArch64::GPR64RegClass); local 1080 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::i64); 1102 unsigned VReg = MF.addLiveIn(AArch64FPRArgRegs[i], local 1104 SDValue Val = DAG.getCopyFromReg(Chain, DL, VReg, MVT::f128);
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/freebsd-10.1-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2373 unsigned VReg = MF.addLiveIn(GPR64ArgRegs[NumIntRegs], local 2375 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::i64); 2400 unsigned VReg = MF.addLiveIn(XMMArgRegs64Bit[NumXMMRegs], local 2402 SDValue Val = DAG.getCopyFromReg(Chain, dl, VReg, MVT::v4f32);
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