Searched refs:RRR (Results 1 - 3 of 3) sorted by relevance

/freebsd-10.1-release/contrib/binutils/include/opcode/
H A Dspu.h25 RRR, enumerator in enum:__anon602
H A Dspu-insns.h26 RRR | op | RC | RB | RA | RT | RI7 | op | I7 | RA | RT |
58 case, bit field other than op are defined as 0s. For example, opcode of fma instruction which is RRR format is defined as 0x700,
63 RRR category RI7 category
89 Note that RRR instructions have the names for RC and RT reversed from
207 APUOP(M_SHUFB, RRR, 0x580, "shufb", _A4(A_C,A_A,A_B,A_T), 02111, SHUF) /* SHUFfleBytes RC<-f(RA,RB,RT) */
329 APUOP(M_FMA, RRR, 0x700, "fma", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FMAdd RC<-RT+RA*RB */
330 APUOP(M_FMS, RRR, 0x780, "fms", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FMSub RC<-RA*RB-RT */
331 APUOP(M_FNMS, RRR, 0x680, "fnms", _A4(A_C,A_A,A_B,A_T), 02111, FP6) /* FNMSub RC<-RT-RA*RB */
332 APUOP(M_MPYA, RRR, 0x600, "mpya", _A4(A_C,A_A,A_B,A_T), 02111, FP7) /* MPYA RC<-RA*RB+RT */
333 APUOP(M_SELB, RRR,
[all...]
/freebsd-10.1-release/contrib/binutils/opcodes/
H A Dspu-dis.c64 && index->insn_type == RRR)

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