Searched refs:OutVals (Results 1 - 25 of 26) sorted by relevance

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/freebsd-10.1-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.h132 const SmallVectorImpl<SDValue> &OutVals,
165 const SmallVectorImpl<SDValue> &OutVals,
H A DMSP430ISelLowering.cpp400 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
417 Outs, OutVals, Ins, dl, DAG, InVals);
528 const SmallVectorImpl<SDValue> &OutVals,
554 OutVals[i], Flag);
583 const SmallVectorImpl<SDValue> &OutVals,
608 SDValue Arg = OutVals[i];
525 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument
578 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
/freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.h91 const SmallVectorImpl<SDValue> &OutVals,
124 const SmallVectorImpl<SDValue> &OutVals,
135 const SmallVectorImpl<SDValue> &OutVals,
H A DHexagonISelLowering.cpp316 const SmallVectorImpl<SDValue> &OutVals,
336 Chain = DAG.getCopyToReg(Chain, dl, VA.getLocReg(), OutVals[i], Flag);
368 const SmallVectorImpl<SDValue> &OutVals,
399 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
445 Outs, OutVals, Ins, DAG);
472 SDValue Arg = OutVals[i];
611 InVals, OutVals, Callee);
1689 const SmallVectorImpl<SDValue> &OutVals,
313 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument
362 LowerCallResult(SDValue Chain, SDValue InFlag, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals, const SmallVectorImpl<SDValue> &OutVals, SDValue Callee) const argument
1682 IsEligibleForTailCallOptimization( SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
/freebsd-10.1-release/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.h124 const SmallVectorImpl<SDValue> &OutVals,
129 const SmallVectorImpl<SDValue> &OutVals,
134 const SmallVectorImpl<SDValue> &OutVals,
H A DSparcISelLowering.cpp174 const SmallVectorImpl<SDValue> &OutVals,
177 return LowerReturn_64(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
178 return LowerReturn_32(Chain, CallConv, IsVarArg, Outs, OutVals, DL, DAG);
185 const SmallVectorImpl<SDValue> &OutVals,
210 OutVals[i], Flag);
248 const SmallVectorImpl<SDValue> &OutVals,
271 SDValue OutVal = OutVals[i];
296 SDValue NV = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, OutVals[i+1]);
687 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
171 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
182 LowerReturn_32(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
245 LowerReturn_64(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
[all...]
/freebsd-10.1-release/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.h131 const SmallVectorImpl<SDValue> &OutVals,
199 const SmallVectorImpl<SDValue> &OutVals,
H A DXCoreISelLowering.cpp882 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
901 Outs, OutVals, Ins, dl, DAG, InVals);
914 const SmallVectorImpl<SDValue> &OutVals,
942 SDValue Arg = OutVals[i];
1274 const SmallVectorImpl<SDValue> &OutVals,
1300 OutVals[i], Flag);
910 LowerCCCCallTo(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
1271 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument
/freebsd-10.1-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp524 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
555 // So a different index should be used for indexing into Outs/OutVals.
592 SDValue StVal = OutVals[OIdx];
637 SDValue Elt = OutVals[OIdx++];
651 SDValue Elt0 = OutVals[OIdx++];
652 SDValue Elt1 = OutVals[OIdx++];
697 StoreVal = OutVals[OIdx++];
703 StoreVal = OutVals[OIdx++];
715 StoreVal = OutVals[OId
1695 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument
[all...]
H A DNVPTXISelLowering.h132 const SmallVectorImpl<SDValue> &OutVals, SDLoc dl,
/freebsd-10.1-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.h562 const SmallVectorImpl<SDValue> &OutVals,
603 const SmallVectorImpl<SDValue> &OutVals,
612 const SmallVectorImpl<SDValue> &OutVals,
620 const SmallVectorImpl<SDValue> &OutVals,
H A DPPCISelLowering.cpp2869 const SmallVectorImpl<SDValue> &OutVals,
3522 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
3537 isTailCall, Outs, OutVals, Ins,
3541 isTailCall, Outs, OutVals, Ins,
3546 isTailCall, Outs, OutVals, Ins,
3555 const SmallVectorImpl<SDValue> &OutVals,
3668 SDValue Arg = OutVals[i];
3790 const SmallVectorImpl<SDValue> &OutVals,
3820 Outs, OutVals, nAltivecParamsAtEn
2863 CalculateParameterAndLinkageAreaSize(SelectionDAG &DAG, bool isPPC64, bool isVarArg, unsigned CC, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, unsigned &nAltivecParamsAtEnd) argument
3551 LowerCall_32SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
3786 LowerCall_64SVR4(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
4167 LowerCall_Darwin(SDValue Chain, SDValue Callee, CallingConv::ID CallConv, bool isVarArg, bool isTailCall, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SDLoc dl, SelectionDAG &DAG, SmallVectorImpl<SDValue> &InVals) const argument
4527 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument
[all...]
/freebsd-10.1-release/contrib/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.h224 const SmallVectorImpl<SDValue> &OutVals,
255 const SmallVectorImpl<SDValue> &OutVals,
H A DAArch64ISelLowering.cpp1248 const SmallVectorImpl<SDValue> &OutVals,
1281 SDValue Arg = OutVals[i];
1324 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
1342 Outs, OutVals, Ins, DAG);
1400 SDValue Arg = OutVals[i];
1634 const SmallVectorImpl<SDValue> &OutVals,
1245 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument
1628 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool IsVarArg, bool IsCalleeStructRet, bool IsCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
/freebsd-10.1-release/contrib/llvm/lib/Target/R600/
H A DAMDGPUISelLowering.h84 const SmallVectorImpl<SDValue> &OutVals,
H A DAMDGPUISelLowering.cpp245 const SmallVectorImpl<SDValue> &OutVals,
240 LowerReturn( SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
/freebsd-10.1-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.h245 const SmallVectorImpl<SDValue> &OutVals,
H A DSystemZISelLowering.cpp776 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
810 SDValue ArgValue = OutVals[I];
930 const SmallVectorImpl<SDValue> &OutVals,
949 SDValue RetValue = OutVals[I];
927 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
/freebsd-10.1-release/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.h523 const SmallVectorImpl<SDValue> &OutVals,
536 const SmallVectorImpl<SDValue> &OutVals,
H A DARMISelLowering.cpp1440 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
1460 Outs, OutVals, Ins, DAG);
1501 SDValue Arg = OutVals[realArgIdx];
1829 isThisReturn ? OutVals[0] : SDValue());
1963 const SmallVectorImpl<SDValue> &OutVals,
2070 SDValue Arg = OutVals[realArgIdx];
2149 const SmallVectorImpl<SDValue> &OutVals,
2174 SDValue Arg = OutVals[realRVLocIdx];
1957 IsEligibleForTailCallOptimization(SDValue Callee, CallingConv::ID CalleeCC, bool isVarArg, bool isCalleeStructRet, bool isCallerStructRet, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, const SmallVectorImpl<ISD::InputArg> &Ins, SelectionDAG& DAG) const argument
2146 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool isVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc dl, SelectionDAG &DAG) const argument
/freebsd-10.1-release/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.h841 const SmallVectorImpl<SDValue> &OutVals,
914 const SmallVectorImpl<SDValue> &OutVals,
/freebsd-10.1-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.h543 const SmallVectorImpl<SDValue> &OutVals,
H A DMipsISelLowering.cpp2307 SmallVectorImpl<SDValue> &OutVals = CLI.OutVals; local
2367 SDValue Arg = OutVals[i];
2709 const SmallVectorImpl<SDValue> &OutVals,
2730 SDValue Val = OutVals[i];
2706 LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, const SmallVectorImpl<ISD::OutputArg> &Outs, const SmallVectorImpl<SDValue> &OutVals, SDLoc DL, SelectionDAG &DAG) const argument
/freebsd-10.1-release/contrib/llvm/include/llvm/Target/
H A DTargetLowering.h1971 SmallVector<SDValue, 32> OutVals;
2042 const SmallVectorImpl<SDValue> &/*OutVals*/,
/freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGBuilder.cpp1204 SmallVector<SDValue, 8> OutVals;
1283 OutVals.push_back(Parts[i]);
1293 Outs, OutVals, getCurSDLoc(),
7023 CLI.OutVals.clear();
7108 CLI.OutVals.push_back(Parts[j]);

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