| /freebsd-10.1-release/sys/contrib/dev/acpica/compiler/ |
| H A D | asltransform.c | 398 ACPI_PARSE_OBJECT *NewOp; local
457 NewOp = TrCreateLeafNode (PARSEOP_ELSE);
458 NewOp->Asl.Parent = Conditional->Asl.Parent;
459 TrAmlInitLineNumbers (NewOp, NewOp->Asl.Parent);
463 TrAmlInsertPeer (Conditional, NewOp);
464 CurrentParentNode = NewOp;
486 NewOp = NewOp2;
489 NewOp->Asl.Next = NewOp2;
492 NewOp
[all...] |
| H A D | aslopcodes.c | 671 ACPI_PARSE_OBJECT *NewOp; local
699 NewOp = TrAllocateNode (PARSEOP_INTEGER);
701 NewOp->Asl.AmlOpcode = AML_BYTE_OP;
702 NewOp->Asl.Value.Integer = 16;
703 NewOp->Asl.Parent = Op;
705 Op->Asl.Child = NewOp;
706 Op = NewOp;
710 NewOp = TrAllocateNode (PARSEOP_RAW_DATA);
711 NewOp->Asl.AmlOpcode = AML_RAW_DATA_BUFFER;
712 NewOp
[all...] |
| /freebsd-10.1-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonPeephole.cpp | 258 int NewOp = QII->getInvertedPredicatedOpcode(MI->getOpcode()); local
259 MI->setDesc(QII->get(NewOp));
269 unsigned NewOp = 0; local
277 NewOp = Op;
280 NewOp = Hexagon::TFR_condset_ir;
283 NewOp = Hexagon::TFR_condset_ri;
286 NewOp = Hexagon::MUX_ir;
289 NewOp = Hexagon::MUX_ri;
292 if (NewOp) {
296 MI->setDesc(QII->get(NewOp));
[all...] |
| H A D | HexagonInstrInfo.cpp | 1535 int NewOp = opc; local
1536 if (isPredicated(NewOp) && isPredicatedNew(NewOp)) { // Get predicate old form
1537 NewOp = Hexagon::getPredOldOpcode(NewOp);
1538 if (NewOp < 0)
1542 if (isNewValueStore(NewOp)) { // Convert into non new-value format
1543 NewOp = Hexagon::getNonNVStore(NewOp);
1544 if (NewOp <
[all...] |
| /freebsd-10.1-release/sys/contrib/dev/acpica/components/parser/ |
| H A D | psobject.c | 280 * NewOp - Returned Op
292 ACPI_PARSE_OBJECT **NewOp)
329 *NewOp = NamedOp;
381 WalkState->Op = *NewOp = Op;
289 AcpiPsCreateOp( ACPI_WALK_STATE *WalkState, UINT8 *AmlOpStart, ACPI_PARSE_OBJECT **NewOp) argument
|
| /freebsd-10.1-release/sys/contrib/dev/acpica/include/ |
| H A D | acparser.h | 145 ACPI_PARSE_OBJECT **NewOp);
|
| /freebsd-10.1-release/contrib/llvm/lib/Transforms/InstCombine/ |
| H A D | InstCombineAndOrXor.cpp | 1302 Value *NewOp = Builder->CreateAnd(Op0COp, Op1COp, I.getName()); local
1303 return CastInst::Create(Op0C->getOpcode(), NewOp, I.getType());
1328 Value *NewOp = local
1331 return BinaryOperator::Create(SI1->getOpcode(), NewOp,
1909 Value *NewOp = Builder->CreateAnd((V1 == A) ? B : A, CI1); local
1910 return BinaryOperator::CreateOr(NewOp, V1);
2106 Value *NewOp = Builder->CreateOr(SI0->getOperand(0), SI1->getOperand(0), local
2108 return BinaryOperator::Create(SI1->getOpcode(), NewOp,
2191 Value *NewOp = Builder->CreateOr(Op0COp, Op1COp, I.getName()); local
2192 return CastInst::Create(Op0C->getOpcode(), NewOp,
2450 Value *NewOp = local
2502 Value *NewOp = Builder->CreateXor(Op0C->getOperand(0), local
[all...] |
| H A D | InstCombineMulDivRem.cpp | 132 Value *NewOp; local
135 if (match(&I, m_Mul(m_Shl(m_Value(NewOp), m_Constant(C2)),
139 return BinaryOperator::CreateMul(NewOp, ConstantExpr::getShl(C1, C2));
141 if (match(&I, m_Mul(m_Value(NewOp), m_Constant(C1)))) {
145 NewCst = ConstantInt::get(NewOp->getType(), IVal->logBase2());
152 BinaryOperator *Shl = BinaryOperator::CreateShl(NewOp, NewCst);
|
| /freebsd-10.1-release/contrib/llvm/include/llvm/Analysis/ |
| H A D | ScalarEvolution.h | 622 SmallVector<const SCEV *, 4> NewOp(Operands.begin(), Operands.end());
623 return getAddRecExpr(NewOp, L, Flags);
|
| /freebsd-10.1-release/contrib/llvm/lib/Transforms/Scalar/ |
| H A D | Reassociate.cpp | 796 BinaryOperator *NewOp; local
799 NewOp = BinaryOperator::Create(Instruction::BinaryOps(Opcode),
802 NewOp = NodesToRewrite.pop_back_val();
806 Op->setOperand(0, NewOp);
811 Op = NewOp;
|
| /freebsd-10.1-release/contrib/llvm/lib/TableGen/ |
| H A D | Record.cpp | 1060 const OpInit *NewOp = RHSo->clone(NewOperands); local
1061 Init *NewVal = NewOp->Fold(CurRec, CurMultiClass);
1062 if (NewVal != NewOp)
1133 const OpInit *NewOp = RHSo->clone(NewOperands); local
1134 Init *NewItem = NewOp->Fold(CurRec, CurMultiClass);
1135 if (NewItem != NewOp)
|
| /freebsd-10.1-release/contrib/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 6746 SDValue NewOp = Compact8x32ShuffleNode(SVOp, DAG); local
6747 if (NewOp.getNode())
6748 return NewOp;
7223 SDValue NewOp = LowerVectorIntExtend(Op, Subtarget, DAG); local
7224 if (NewOp.getNode())
7225 return NewOp;
7231 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG); local
7232 if (NewOp.getNode())
7233 return DAG.getNode(ISD::BITCAST, dl, VT, NewOp);
7239 SDValue NewOp local
7248 SDValue NewOp = RewriteAsNarrowerShuffle(SVOp, DAG); local
7303 SDValue NewOp = NormalizeVectorShuffle(Op, Subtarget, DAG); local
7553 SDValue NewOp = LowerVECTOR_SHUFFLEv8i16(Op, Subtarget, DAG); local
7559 SDValue NewOp = LowerVECTOR_SHUFFLEv16i8(SVOp, Subtarget, DAG); local
7565 SDValue NewOp = LowerVECTOR_SHUFFLEv32i8(SVOp, Subtarget, DAG); local
13506 ReplaceATOMIC_BINARY_64(SDNode *Node, SmallVectorImpl<SDValue>&Results, SelectionDAG &DAG, unsigned NewOp) argument
16429 SDValue NewOp = XFormVExtractWithShuffleIntoLoad(N, DAG, DCI); local
18683 unsigned NewOp = 0; local
[all...] |
| /freebsd-10.1-release/contrib/llvm/lib/Bitcode/Reader/ |
| H A D | BitcodeReader.cpp | 333 Value *NewOp; local
336 NewOp = *I;
339 NewOp = RealVal;
347 NewOp = operator[](It->second);
350 NewOps.push_back(cast<Constant>(NewOp));
|
| /freebsd-10.1-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | LegalizeFloatTypes.cpp | 136 SDValue NewOp = BitConvertVectorToIntegerVector(N->getOperand(0)); local
138 NewOp.getValueType().getVectorElementType(),
139 NewOp, N->getOperand(1));
|
| H A D | DAGCombiner.cpp | 800 SDValue NewOp = PromoteOperand(Op, PVT, Replace); local
801 if (NewOp.getNode() == 0)
803 AddToWorkList(NewOp.getNode());
806 ReplaceLoadWithPromotedLoad(Op.getNode(), NewOp.getNode());
807 return DAG.getNode(ISD::SIGN_EXTEND_INREG, dl, NewOp.getValueType(), NewOp,
815 SDValue NewOp = PromoteOperand(Op, PVT, Replace); local
816 if (NewOp.getNode() == 0)
818 AddToWorkList(NewOp.getNode());
821 ReplaceLoadWithPromotedLoad(Op.getNode(), NewOp
[all...] |
| /freebsd-10.1-release/contrib/llvm/lib/Target/ARM/ |
| H A D | ARMFastISel.cpp | 304 unsigned NewOp = createResultReg(RegClass); local
306 TII.get(TargetOpcode::COPY), NewOp).addReg(Op));
307 return NewOp;
|
| H A D | ARMISelLowering.cpp | 5440 SDValue NewOp = LowerVECTOR_SHUFFLEv8i8(Op, ShuffleMask, DAG); local
5441 if (NewOp.getNode())
5442 return NewOp;
|
| /freebsd-10.1-release/contrib/llvm/lib/Transforms/Vectorize/ |
| H A D | BBVectorize.cpp | 2572 Instruction *NewOp = local
2575 NewOp->insertBefore(IBeforeJ ? J : I);
2576 return NewOp;
|
| /freebsd-10.1-release/contrib/llvm/lib/Analysis/ |
| H A D | ScalarEvolution.cpp | 1326 const SCEV *NewOp = T->getOperand(); local
1327 if (getTypeSizeInBits(NewOp->getType()) < getTypeSizeInBits(Ty))
1328 return getAnyExtendExpr(NewOp, Ty);
1329 return getTruncateOrNoop(NewOp, Ty);
|