Searched refs:reg (Results 1 - 25 of 1323) sorted by relevance

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/freebsd-10.0-release/contrib/gcc/config/i386/
H A Dknetbsd-gnu.h24 #define REG_NAME(reg) sc_ ## reg
H A Dkfreebsd-gnu.h26 #define REG_NAME(reg) sc_ ## reg
H A Dlinux-unwind.h70 fs->regs.reg[0].how = REG_SAVED_OFFSET;
71 fs->regs.reg[0].loc.offset = (long)&sc->rax - new_cfa;
72 fs->regs.reg[1].how = REG_SAVED_OFFSET;
73 fs->regs.reg[1].loc.offset = (long)&sc->rdx - new_cfa;
74 fs->regs.reg[2].how = REG_SAVED_OFFSET;
75 fs->regs.reg[2].loc.offset = (long)&sc->rcx - new_cfa;
76 fs->regs.reg[3].how = REG_SAVED_OFFSET;
77 fs->regs.reg[3].loc.offset = (long)&sc->rbx - new_cfa;
78 fs->regs.reg[4].how = REG_SAVED_OFFSET;
79 fs->regs.reg[
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/freebsd-10.0-release/sys/amd64/include/
H A Dreg.h6 #include <x86/reg.h>
/freebsd-10.0-release/sys/i386/include/
H A Dreg.h6 #include <x86/reg.h>
/freebsd-10.0-release/sys/pc98/include/
H A Dreg.h6 #include <x86/reg.h>
/freebsd-10.0-release/contrib/gdb/gdb/regformats/
H A Dregdef.h24 struct reg struct
44 void set_register_cache (struct reg *regs, int n);
/freebsd-10.0-release/sys/dev/etherswitch/arswitch/
H A Darswitch_phy.h31 extern int arswitch_readphy(device_t dev, int phy, int reg);
32 extern int arswitch_writephy(device_t dev, int phy, int reg, int data);
/freebsd-10.0-release/sys/dev/ixgbe/
H A Dixgbe_dcb_82598.c121 u32 reg = 0; local
126 reg = IXGBE_READ_REG(hw, IXGBE_RUPPBMR) | IXGBE_RUPPBMR_MQA;
127 IXGBE_WRITE_REG(hw, IXGBE_RUPPBMR, reg);
129 reg = IXGBE_READ_REG(hw, IXGBE_RMCS);
131 reg &= ~IXGBE_RMCS_ARBDIS;
133 reg |= IXGBE_RMCS_RRM;
135 reg |= IXGBE_RMCS_DFP;
137 IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg);
144 reg = credit_refill | (credit_max << IXGBE_RT2CR_MCL_SHIFT);
147 reg |
177 u32 reg, max_credits; local
221 u32 reg; local
264 u32 fcrtl, reg; local
316 u32 reg = 0; local
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H A Dixgbe_dcb_82599.c121 u32 reg = 0; local
130 reg = IXGBE_RTRPCS_RRM | IXGBE_RTRPCS_RAC | IXGBE_RTRPCS_ARBDIS;
131 IXGBE_WRITE_REG(hw, IXGBE_RTRPCS, reg);
139 reg = 0;
141 reg |= (map[i] << (i * IXGBE_RTRUP2TC_UP_SHIFT));
143 IXGBE_WRITE_REG(hw, IXGBE_RTRUP2TC, reg);
149 reg = credit_refill | (credit_max << IXGBE_RTRPT4C_MCL_SHIFT);
151 reg |= (u32)(bwg_id[i]) << IXGBE_RTRPT4C_BWG_SHIFT;
154 reg |= IXGBE_RTRPT4C_LSP;
156 IXGBE_WRITE_REG(hw, IXGBE_RTRPT4C(i), reg);
179 u32 reg, max_credits; local
225 u32 reg; local
285 u32 i, j, fcrtl, reg; local
365 u32 reg = 0; local
491 u32 reg; local
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/freebsd-10.0-release/sys/dev/cy/
H A Dcyreg.h58 #define cd_inb(iobase, reg, cy_align) \
59 (++cd_inbs, *((iobase) + (2 * (reg) << (cy_align))))
60 #define cy_inb(iobase, reg, cy_align) \
61 (++cy_inbs, *((iobase) + ((reg) << (cy_align))))
62 #define cd_outb(iobase, reg, cy_align, val) \
63 (++cd_outbs, (void)(*((iobase) + (2 * (reg) << (cy_align))) = (val)))
64 #define cy_outb(iobase, reg, cy_align, val) \
65 (++cy_outbs, (void)(*((iobase) + ((reg) << (cy_align))) = (val)))
67 #define cd_inb(iobase, reg, cy_align) \
68 (*((iobase) + (2 * (reg) << (cy_alig
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/freebsd-10.0-release/sys/mips/atheros/
H A Dar71xx_gpiovar.h42 #define GPIO_WRITE(sc, reg, val) do { \
43 bus_write_4(sc->gpio_mem_res, (reg), (val)); \
46 #define GPIO_READ(sc, reg) bus_read_4(sc->gpio_mem_res, (reg))
48 #define GPIO_SET_BITS(sc, reg, bits) \
49 GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg)) | (bits))
51 #define GPIO_CLEAR_BITS(sc, reg, bits) \
52 GPIO_WRITE(sc, reg, GPIO_READ(sc, (reg))
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/freebsd-10.0-release/gnu/usr.bin/gdb/gdbserver/
H A Dfbsd-amd64-low.c32 #include <machine/reg.h>
37 offsetof(struct reg, r_rax),
38 offsetof(struct reg, r_rbx),
39 offsetof(struct reg, r_rcx),
40 offsetof(struct reg, r_rdx),
41 offsetof(struct reg, r_rsi),
42 offsetof(struct reg, r_rdi),
43 offsetof(struct reg, r_rbp),
44 offsetof(struct reg, r_rsp),
45 offsetof(struct reg, r_r
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/freebsd-10.0-release/sys/arm/xscale/ixp425/
H A Dixdp425_pci.c62 uint32_t reg; local
66 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOUTR);
67 reg &= ~(1U << GPIO_PCI_RESET);
68 GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPOUTR, reg);
71 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPCLKR);
72 reg &= ~GPCLKR_MUX14;
73 GPIO_CONF_WRITE_4(sc, IXP425_GPIO_GPCLKR, reg);
80 reg = GPIO_CONF_READ_4(sc, IXP425_GPIO_GPOER);
81 reg &= ~(1U << GPIO_PCI_CLK);
82 reg
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/freebsd-10.0-release/sys/contrib/octeon-sdk/
H A Dcvmx-fau.h149 * @param reg FAU atomic register to access. 0 <= reg < 2048.
155 static inline uint64_t __cvmx_fau_store_address(uint64_t noadd, uint64_t reg) argument
159 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg));
170 * @param reg FAU atomic register to access. 0 <= reg < 2048.
179 static inline uint64_t __cvmx_fau_atomic_address(uint64_t tagwait, uint64_t reg, int64_t value) argument
184 cvmx_build_bits(CVMX_FAU_BITS_REGISTER, reg));
190 * @param reg FAU atomic register to access. 0 <= reg < 204
196 cvmx_fau_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value) argument
210 cvmx_fau_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value) argument
223 cvmx_fau_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value) argument
235 cvmx_fau_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) argument
252 cvmx_fau_tagwait_fetch_and_add64(cvmx_fau_reg_64_t reg, int64_t value) argument
275 cvmx_fau_tagwait_fetch_and_add32(cvmx_fau_reg_32_t reg, int32_t value) argument
297 cvmx_fau_tagwait_fetch_and_add16(cvmx_fau_reg_16_t reg, int16_t value) argument
318 cvmx_fau_tagwait_fetch_and_add8(cvmx_fau_reg_8_t reg, int8_t value) argument
352 __cvmx_fau_iobdma_data(uint64_t scraddr, int64_t value, uint64_t tagwait, cvmx_fau_op_size_t size, uint64_t reg) argument
376 cvmx_fau_async_fetch_and_add64(uint64_t scraddr, cvmx_fau_reg_64_t reg, int64_t value) argument
393 cvmx_fau_async_fetch_and_add32(uint64_t scraddr, cvmx_fau_reg_32_t reg, int32_t value) argument
409 cvmx_fau_async_fetch_and_add16(uint64_t scraddr, cvmx_fau_reg_16_t reg, int16_t value) argument
424 cvmx_fau_async_fetch_and_add8(uint64_t scraddr, cvmx_fau_reg_8_t reg, int8_t value) argument
444 cvmx_fau_async_tagwait_fetch_and_add64(uint64_t scraddr, cvmx_fau_reg_64_t reg, int64_t value) argument
464 cvmx_fau_async_tagwait_fetch_and_add32(uint64_t scraddr, cvmx_fau_reg_32_t reg, int32_t value) argument
483 cvmx_fau_async_tagwait_fetch_and_add16(uint64_t scraddr, cvmx_fau_reg_16_t reg, int16_t value) argument
501 cvmx_fau_async_tagwait_fetch_and_add8(uint64_t scraddr, cvmx_fau_reg_8_t reg, int8_t value) argument
513 cvmx_fau_atomic_add64(cvmx_fau_reg_64_t reg, int64_t value) argument
525 cvmx_fau_atomic_add32(cvmx_fau_reg_32_t reg, int32_t value) argument
537 cvmx_fau_atomic_add16(cvmx_fau_reg_16_t reg, int16_t value) argument
548 cvmx_fau_atomic_add8(cvmx_fau_reg_8_t reg, int8_t value) argument
560 cvmx_fau_atomic_write64(cvmx_fau_reg_64_t reg, int64_t value) argument
572 cvmx_fau_atomic_write32(cvmx_fau_reg_32_t reg, int32_t value) argument
584 cvmx_fau_atomic_write16(cvmx_fau_reg_16_t reg, int16_t value) argument
595 cvmx_fau_atomic_write8(cvmx_fau_reg_8_t reg, int8_t value) argument
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H A Dcvmx-cn3010-evb-hs5.c108 uint8_t reg[8]; local
113 memset(&reg, 0, sizeof(reg));
119 reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0);
121 reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR);
124 if ((sec & 0xf) == (reg[0] & 0xf))
128 tms.tm_sec = bcd2bin(reg[0] & 0x7f);
129 tms.tm_min = bcd2bin(reg[1] & 0x7f);
130 tms.tm_hour = bcd2bin(reg[2] & 0x3f);
131 if ((reg[
157 uint8_t reg[8]; local
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/freebsd-10.0-release/contrib/gdb/gdb/
H A Duser-regs.c62 user_reg_read_ftype *read, struct user_reg *reg)
67 gdb_assert (reg != NULL);
68 reg->name = name;
69 reg->read = read;
70 reg->next = NULL;
71 (*regs->last) = reg;
94 struct user_reg *reg; local
97 for (reg = builtin_user_regs.first; reg != NULL; reg
61 append_user_reg(struct gdb_user_regs *regs, const char *name, user_reg_read_ftype *read, struct user_reg *reg) argument
147 struct user_reg *reg; local
165 struct user_reg *reg; local
186 struct user_reg *reg = usernum_to_user_reg (gdbarch, regnum - maxregs); local
200 struct user_reg *reg = usernum_to_user_reg (gdbarch, regnum - maxregs); local
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/freebsd-10.0-release/sys/ia64/include/
H A Dpci_cfgreg.h34 uint32_t pci_cfgregread(int bus, int slot, int func, int reg, int len);
35 void pci_cfgregwrite(int bus, int slot, int func, int reg, uint32_t data,
/freebsd-10.0-release/contrib/wpa/src/wps/
H A Dwps_upnp_ap.c22 struct wps_registrar *reg = timeout_ctx; local
25 wps_registrar_selected_registrar_changed(reg);
29 int upnp_er_set_selected_registrar(struct wps_registrar *reg, argument
43 s->reg = reg;
44 eloop_cancel_timeout(upnp_er_set_selected_timeout, s, reg);
71 upnp_er_set_selected_timeout, s, reg);
74 wps_registrar_selected_registrar_changed(reg);
80 void upnp_er_remove_notification(struct wps_registrar *reg, argument
84 eloop_cancel_timeout(upnp_er_set_selected_timeout, s, reg);
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/freebsd-10.0-release/sys/dev/vx/
H A Dif_vxvar.h60 #define CSR_WRITE_4(sc, reg, val) \
61 bus_space_write_4(sc->vx_bst, sc->vx_bsh, reg, val)
62 #define CSR_WRITE_2(sc, reg, val) \
63 bus_space_write_2(sc->vx_bst, sc->vx_bsh, reg, val)
64 #define CSR_WRITE_1(sc, reg, val) \
65 bus_space_write_1(sc->vx_bst, sc->vx_bsh, reg, val)
67 #define CSR_READ_4(sc, reg) \
68 bus_space_read_4(sc->vx_bst, sc->vx_bsh, reg)
69 #define CSR_READ_2(sc, reg) \
70 bus_space_read_2(sc->vx_bst, sc->vx_bsh, reg)
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/freebsd-10.0-release/sys/powerpc/wii/
H A Dwii_fbvar.h102 volatile uint16_t *reg = local
105 vt->vt_eqpulse = *reg & 0xf;
106 vt->vt_actvideo = (*reg >> 4) & 0x3ff;
112 volatile uint16_t *reg = local
115 *reg = ((vt->vt_actvideo & 0x3ff) << 4) |
138 volatile uint16_t *reg = local
141 dc->dc_enable = *reg & 0x1;
142 dc->dc_reset = (*reg >> 1) & 0x1;
143 dc->dc_noninterlaced = (*reg >> 2) & 0x1;
144 dc->dc_3dmode = (*reg >>
153 volatile uint16_t *reg = local
180 volatile uint32_t *reg = local
191 volatile uint32_t *reg = local
213 volatile uint32_t *reg = local
224 volatile uint32_t *reg = local
246 volatile uint32_t *reg = local
256 volatile uint32_t *reg = local
277 volatile uint32_t *reg = local
287 volatile uint32_t *reg = local
311 volatile uint32_t *reg = local
324 volatile uint32_t *reg = local
350 volatile uint32_t *reg = local
363 volatile uint32_t *reg = local
388 volatile uint32_t *reg = local
400 volatile uint32_t *reg = local
423 volatile uint32_t *reg = local
434 volatile uint32_t *reg = local
457 volatile uint32_t *reg = local
469 volatile uint32_t *reg = local
492 volatile uint32_t *reg = local
503 volatile uint32_t *reg = local
519 volatile uint32_t *reg = local
528 volatile uint32_t *reg = local
543 volatile uint32_t *reg = local
552 volatile uint32_t *reg = local
577 volatile uint32_t *reg = (uint32_t *)(sc->sc_reg_addr + local
589 volatile uint32_t *reg = (uint32_t *)(sc->sc_reg_addr + local
624 volatile uint16_t *reg = local
634 volatile uint16_t *reg = local
655 volatile uint16_t *reg = local
665 volatile uint16_t *reg = local
688 volatile uint32_t *reg = local
703 volatile uint32_t *reg = local
718 volatile uint16_t *reg = local
727 volatile uint16_t *reg = local
744 volatile uint16_t *reg = local
765 volatile uint16_t *reg = local
774 volatile uint16_t *reg = local
790 volatile uint16_t *reg = local
805 volatile uint16_t *reg = local
820 volatile uint16_t *reg = local
835 volatile uint32_t *reg = local
850 volatile uint32_t *reg = local
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/freebsd-10.0-release/sys/powerpc/include/
H A Dreg.h1 /* $NetBSD: reg.h,v 1.4 2000/06/04 09:30:44 tsubai Exp $ */
12 struct reg { struct
55 int fill_regs(struct thread *, struct reg *);
56 int set_regs(struct thread *, struct reg *);
69 #define fill_fpregs32(td, reg) fill_fpregs(td,(struct fpreg *)reg)
70 #define set_fpregs32(td, reg) set_fpregs(td,(struct fpreg *)reg)
71 #define fill_dbregs32(td, reg) fill_dbregs(td,(struct dbreg *)reg)
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/freebsd-10.0-release/sys/boot/fdt/dts/
H A Dtrimslice.dts48 reg = < 0x00000000 0x40000000 >; /* 1GB RAM at 0x0 */
64 reg = < 0x50041000 0x1000 >, /* Distributor Registers */
72 reg = < 0x50040200 0x100 >, /* Global Timer Registers */
80 reg = <0x60005000 0x8>;
87 reg = <0x60005008 0x8>;
94 reg = <0x60005010 0x8>;
99 reg = <0x60005050 0x8>;
106 reg = <0x60005058 0x8>;
113 reg = <0x70006000 0x40>;
114 reg
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H A Dversatilepb.dts20 reg = <0x10140000 0x1000>;
28 reg = <0x10003000 0x28>;
36 reg = <0x101f1000 0x1000>;
40 reg-shift = <2>;
45 reg = <0x101f2000 0x1000>;
49 reg-shift = <2>;
54 reg = <0x101f3000 0x1000>;
58 reg-shift = <2>;
63 reg = <0x101e2000 0x40>;
71 reg
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/freebsd-10.0-release/sys/mips/cavium/
H A Docteon_ds1337.c99 uint8_t reg[8]; local
105 memset(&reg, 0, sizeof(reg));
111 reg[0] = cvmx_twsi_read8(CVMX_RTC_DS1337_ADDR, 0x0);
113 reg[i] = cvmx_twsi_read8_cur_addr(CVMX_RTC_DS1337_ADDR);
116 if ((sec & 0xf) == (reg[0] & 0xf))
120 ct.sec = bcd2bin(reg[0] & 0x7f);
121 ct.min = bcd2bin(reg[1] & 0x7f);
122 ct.hour = bcd2bin(reg[2] & 0x3f);
123 if ((reg[
160 uint8_t reg[8]; local
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