Searched refs:lane (Results 1 - 15 of 15) sorted by relevance

/freebsd-10.0-release/sys/dev/drm2/
H A Ddrm_dp_helper.c44 int lane)
46 int i = DP_LANE0_1_STATUS + (lane >> 1);
47 int s = (lane & 1) * 4;
57 int lane; local
63 for (lane = 0; lane < lane_count; lane++) {
64 lane_status = dp_get_lane_status(link_status, lane);
74 int lane; local
77 for (lane
43 dp_get_lane_status(u8 link_status[DP_LINK_STATUS_SIZE], int lane) argument
85 drm_dp_get_adjust_request_voltage(u8 link_status[DP_LINK_STATUS_SIZE], int lane) argument
97 drm_dp_get_adjust_request_pre_emphasis(u8 link_status[DP_LINK_STATUS_SIZE], int lane) argument
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H A Ddrm_dp_helper.h333 int lane);
335 int lane);
/freebsd-10.0-release/sys/contrib/octeon-sdk/
H A Dcvmx-qlm.h107 * @param lane Lane in QLM to get
112 extern uint64_t cvmx_qlm_jtag_get(int qlm, int lane, const char *name);
118 * @param lane Lane in QLM to set, or -1 for all lanes
122 extern void cvmx_qlm_jtag_set(int qlm, int lane, const char *name, uint64_t value);
H A Dcvmx-helper-errata.c304 int lane; local
313 for (lane=0; lane<4; lane++)
315 /* Each lane has 268 bits. We need to set cfg_cdr_incx<67:64>=3 and
H A Dcvmx-qlm.c77 * new data => lane 3 => lane 2 => lane 1 => lane 0 => data out
82 * new data => lane 0 => lane 1 => lane 2 => lane 3 => data out
322 * @param lane Lane in QLM to get
327 uint64_t cvmx_qlm_jtag_get(int qlm, int lane, cons argument
353 cvmx_qlm_jtag_set(int qlm, int lane, const char *name, uint64_t value) argument
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H A Dcvmx-sriomaintx-defs.h2505 * This register is used to monitor PHY status on each lane. They are documented here to assist in
2506 * debugging only. The lane numbers take into account the lane swap pin.
2946 * This register contains status information about the local lane transceiver.
2955 the lane is assigned. */
2956 uint32_t lane : 4; /**< Lane Number within the port. */ member in struct:cvmx_sriomaintx_lane_x_status_0::cvmx_sriomaintx_lane_x_status_0_s
2973 controlled by the lane receiver and at least
2975 1 = The lane receiver controls no adaptive
3006 uint32_t lane : 4;
3559 000 = Single-lane, Lan
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/freebsd-10.0-release/sys/dev/drm2/radeon/
H A Datombios_dp.c304 int lane; local
306 for (lane = 0; lane < lane_count; lane++) {
307 u8 this_v = drm_dp_get_adjust_request_voltage(link_status, lane);
308 u8 this_p = drm_dp_get_adjust_request_pre_emphasis(link_status, lane);
310 DRM_DEBUG_KMS("requested signal parameters: lane %d voltage %s pre_emph %s\n",
311 lane,
331 for (lane = 0; lane <
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/freebsd-10.0-release/sys/dev/drm2/i915/
H A Dintel_dp.c197 * intel_dp_max_data_rate for one lane of 2.7GHz evaluates as:
707 DRM_DEBUG_KMS("Display port link bw %02x lane "
766 * Find the lane count in the intel_encoder private
1370 int lane)
1372 int s = ((lane & 1) ?
1375 uint8_t l = adjust_request[lane>>1];
1382 int lane)
1384 int s = ((lane & 1) ?
1387 uint8_t l = adjust_request[lane>>1];
1458 int lane; local
1369 intel_get_adjust_request_voltage(uint8_t adjust_request[2], int lane) argument
1381 intel_get_adjust_request_pre_emphasis(uint8_t adjust_request[2], int lane) argument
1583 intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane) argument
1596 int lane; local
1616 int lane; local
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H A Dintel_display.c5723 int target_clock, pixel_multiplier, lane, link_bw, factor; local
5811 lane = 0;
5818 &lane, &link_bw);
5831 * Hence the bw of each lane in terms of the mode signal
5865 if (!lane) {
5872 lane = bps / (link_bw * 8) + 1;
5875 intel_crtc->fdi_lanes = lane;
5879 ironlake_compute_m_n(intel_crtc->bpp, lane, target_clock, link_bw,
/freebsd-10.0-release/contrib/ofed/management/opensm/opensm/
H A Dosm_ucast_lash.c95 unsigned lane; member in struct:_switch::routing_table
205 int dest_switch, int lane)
218 v = cdg_vertex_matrix[lane][sw][i_next_switch];
223 cdg_vertex_matrix[lane][sw][i_next_switch] = NULL;
237 cdg_vertex_matrix[lane][i_next_switch]
357 int lane)
370 if (cdg_vertex_matrix[lane][sw][next_switch] == NULL) {
389 cdg_vertex_matrix[lane][sw][next_switch] = v;
391 v = cdg_vertex_matrix[lane][sw][next_switch];
430 int dest_switch, int lane)
204 remove_semipermanent_depend_for_sp(lash_t * p_lash, int sw, int dest_switch, int lane) argument
356 generate_cdg_for_sp(lash_t * p_lash, int sw, int dest_switch, int lane) argument
429 set_temp_depend_to_permanent_for_sp(lash_t * p_lash, int sw, int dest_switch, int lane) argument
459 remove_temp_depend_for_sp(lash_t * p_lash, int sw, int dest_switch, int lane) argument
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/freebsd-10.0-release/sys/dev/bxe/
H A Dbxe_elink.c2583 /* Use lane 1 (of lanes 0-3) */
2592 /* Use lane 1 (of lanes 0-3) */
4032 uint8_t lane = 0; local
4063 lane = (port<<1) + path;
4078 lane = path << 1 ;
4080 return lane;
4098 /* In Dual-lane mode, two lanes are joined together,
4336 uint8_t lane = elink_get_warpcore_lane(phy, params); local
4343 lane;
4402 * i.e. reset the lane (i
4507 uint16_t lane = elink_get_warpcore_lane(phy, params); local
4520 uint16_t lane, i, cl72_ctrl, an_adv = 0; local
4661 uint16_t val16, i, lane; local
4729 uint16_t misc1_val, tap_val, tx_driver_val, lane, val; local
4891 elink_warpcore_set_20G_DXGXS(struct bxe_softc *sc, struct elink_phy *phy, uint16_t lane) argument
5047 elink_warpcore_clear_regs(struct elink_phy *phy, struct elink_params *params, uint16_t lane) argument
5143 uint16_t gp2_status_reg0, lane; local
5168 uint16_t lane = elink_get_warpcore_lane(phy, params); local
5210 uint16_t lane = elink_get_warpcore_lane(phy, params); local
5252 uint16_t lane = elink_get_warpcore_lane(phy, params); local
5357 uint16_t val16, lane; local
5413 uint32_t lane; local
6452 uint8_t lane; local
7243 uint8_t lane = elink_get_warpcore_lane(int_phy, params); local
9385 uint8_t lane = elink_get_warpcore_lane(phy, params); local
14544 uint16_t base_page, next_page, not_kr2_device, lane; local
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/freebsd-10.0-release/usr.sbin/tcpdump/tcpdump/
H A DMakefile73 print-lane.c \
/freebsd-10.0-release/contrib/libpcap/
H A Dscanner.l289 lane return LANE;
/freebsd-10.0-release/contrib/llvm/tools/clang/utils/TableGen/
H A DNeonEmitter.cpp770 // a dup/lane instruction.
881 // If we have a 5 op lane accumulator operation, we take characters 1,2,4
1082 // v{st,ld}1_{lane,dup}_{u64,s64} use vldr/vstr/vmov/str instead of
1237 const std::string &lane) {
1240 s += ", " + lane;
2057 // Generate the intrinsic range checking code for shift/lane immediates.
2110 // The immediate generally refers to a lane in the preceding argument.
2208 // The immediate generally refers to a lane in the preceding argument.
1236 SplatLane(unsigned nElts, const std::string &vec, const std::string &lane) argument
/freebsd-10.0-release/contrib/binutils/gas/config/
H A Dtc-arm.c1766 The lane (or one of the NEON_*_LANES constants) is placed in bits [3:0] of
1784 int lane = -1;
1843 if (lane == -1)
1844 lane = NEON_INTERLEAVE_LANES;
1845 else if (lane != NEON_INTERLEAVE_LANES)
1882 if (lane == -1)
1883 lane = atype.index;
1884 else if (lane != atype.index)
1890 else if (lane == -1)
1891 lane
1782 int lane = -1; local
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