Searched refs:isSEXTLoad (Results 1 - 4 of 4) sorted by relevance

/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp601 bool isSEXTLoad, SDValue &Base,
646 bool isSEXTLoad = false; local
650 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
661 bool isLegal = getIndexedAddressParts(Op, VT, isSEXTLoad, Base, Offset,
600 getIndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMISelLowering.cpp5243 if (N->getOpcode() == ISD::SIGN_EXTEND || ISD::isSEXTLoad(N))
9926 bool isSEXTLoad, SDValue &Base,
9932 if (VT == MVT::i16 || ((VT == MVT::i8 || VT == MVT::i1) && isSEXTLoad)) {
9985 bool isSEXTLoad, SDValue &Base,
10022 bool isSEXTLoad = false; local
10026 isSEXTLoad = LD->getExtensionType() == ISD::SEXTLOAD;
10036 isLegal = getT2IndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base,
10039 isLegal = getARMIndexedAddressParts(Ptr.getNode(), VT, isSEXTLoad, Base,
10061 bool isSEXTLoad = false; local
10065 isSEXTLoad
9925 getARMIndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
9984 getT2IndexedAddressParts(SDNode *Ptr, EVT VT, bool isSEXTLoad, SDValue &Base, SDValue &Offset, bool &isInc, SelectionDAG &DAG) argument
[all...]
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAGNodes.h1814 /// isSEXTLoad - Returns true if the specified node is a SEXTLOAD.
1816 inline bool isSEXTLoad(const SDNode *N) { function in namespace:llvm::SDNode::ISD
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp2679 if (ISD::isSEXTLoad(N0.getNode()) && ISD::isUNINDEXEDLoad(N0.getNode()) &&
4433 if ((ISD::isSEXTLoad(N0.getNode()) || ISD::isEXTLoad(N0.getNode())) &&

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