Searched refs:dev_priv (Results 1 - 25 of 77) sorted by relevance

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/freebsd-10.0-release/sys/dev/drm/
H A Dvia_map.c34 drm_via_private_t *dev_priv = dev->dev_private; local
38 dev_priv->sarea = drm_getsarea(dev);
39 if (!dev_priv->sarea) {
41 dev->dev_private = (void *)dev_priv;
46 dev_priv->fb = drm_core_findmap(dev, init->fb_offset);
47 if (!dev_priv->fb) {
49 dev->dev_private = (void *)dev_priv;
53 dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
54 if (!dev_priv->mmio) {
56 dev->dev_private = (void *)dev_priv;
100 drm_via_private_t *dev_priv; local
129 drm_via_private_t *dev_priv = dev->dev_private; local
[all...]
H A Dsavage_bci.c41 savage_bci_wait_fifo_shadow(drm_savage_private_t *dev_priv, unsigned int n) argument
43 uint32_t mask = dev_priv->status_used_mask;
44 uint32_t threshold = dev_priv->bci_threshold_hi;
49 if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold)
56 status = dev_priv->status_ptr[0];
70 savage_bci_wait_fifo_s3d(drm_savage_private_t *dev_priv, unsigned int n) argument
72 uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
91 savage_bci_wait_fifo_s4(drm_savage_private_t *dev_priv, unsigned int n) argument
93 uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
123 savage_bci_wait_event_shadow(drm_savage_private_t *dev_priv, uint16_ argument
146 savage_bci_wait_event_reg(drm_savage_private_t *dev_priv, uint16_t e) argument
167 savage_bci_emit_event(drm_savage_private_t *dev_priv, unsigned int flags) argument
211 drm_savage_private_t *dev_priv = dev->dev_private; local
244 drm_savage_private_t *dev_priv = dev->dev_private; local
277 drm_savage_private_t *dev_priv = dev->dev_private; local
298 savage_dma_init(drm_savage_private_t *dev_priv) argument
322 savage_dma_reset(drm_savage_private_t *dev_priv) argument
337 savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page) argument
365 savage_dma_alloc(drm_savage_private_t *dev_priv, unsigned int n) argument
421 savage_dma_flush(drm_savage_private_t *dev_priv) argument
504 savage_fake_dma_flush(drm_savage_private_t *dev_priv) argument
543 drm_savage_private_t *dev_priv; local
565 drm_savage_private_t *dev_priv = dev->dev_private; local
662 drm_savage_private_t *dev_priv = dev->dev_private; local
674 drm_savage_private_t *dev_priv = dev->dev_private; local
683 drm_savage_private_t *dev_priv = dev->dev_private; local
905 drm_savage_private_t *dev_priv = dev->dev_private; local
951 drm_savage_private_t *dev_priv = dev->dev_private; local
966 drm_savage_private_t *dev_priv = dev->dev_private; local
1061 drm_savage_private_t *dev_priv = dev->dev_private; local
[all...]
H A Dradeon_cp.c46 static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
48 u32 radeon_read_ring_rptr(drm_radeon_private_t *dev_priv, u32 off) argument
52 if (dev_priv->flags & RADEON_IS_AGP) {
53 val = DRM_READ32(dev_priv->ring_rptr, off);
56 dev_priv->ring_rptr->virtual) +
63 u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv) argument
65 if (dev_priv->writeback_works)
66 return radeon_read_ring_rptr(dev_priv, 0);
68 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
75 void radeon_write_ring_rptr(drm_radeon_private_t *dev_priv, u3 argument
84 radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val) argument
89 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index) argument
106 RADEON_READ_MM(drm_radeon_private_t *dev_priv, int addr) argument
120 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
129 RS480_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
138 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
147 RS600_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
156 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
167 radeon_read_fb_location(drm_radeon_private_t *dev_priv) argument
187 radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc) argument
206 radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc) argument
228 radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) argument
263 radeon_enable_bm(struct drm_radeon_private *dev_priv) argument
284 drm_radeon_private_t *dev_priv = dev->dev_private; local
290 RADEON_READ_PCIE(drm_radeon_private_t *dev_priv, int addr) argument
297 radeon_status(drm_radeon_private_t * dev_priv) argument
323 radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv) argument
354 radeon_do_wait_for_fifo(drm_radeon_private_t * dev_priv, int entries) argument
378 radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv) argument
407 radeon_init_pipes(drm_radeon_private_t *dev_priv) argument
465 radeon_cp_load_microcode(drm_radeon_private_t * dev_priv) argument
539 radeon_do_cp_flush(drm_radeon_private_t * dev_priv) argument
552 radeon_do_cp_idle(drm_radeon_private_t * dev_priv) argument
571 radeon_do_cp_start(drm_radeon_private_t * dev_priv) argument
602 radeon_do_cp_reset(drm_radeon_private_t * dev_priv) argument
617 radeon_do_cp_stop(drm_radeon_private_t * dev_priv) argument
630 drm_radeon_private_t *dev_priv = dev->dev_private; local
693 radeon_cp_init_ring_buffer(struct drm_device * dev, drm_radeon_private_t *dev_priv, struct drm_file *file_priv) argument
806 radeon_test_writeback(drm_radeon_private_t * dev_priv) argument
850 radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on) argument
921 rs600_set_igpgart(drm_radeon_private_t *dev_priv, int on) argument
996 radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on) argument
1026 radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on) argument
1073 radeon_setup_pcigart_surface(drm_radeon_private_t *dev_priv) argument
1116 drm_radeon_private_t *dev_priv = dev->dev_private; local
1494 drm_radeon_private_t *dev_priv = dev->dev_private; local
1554 drm_radeon_private_t *dev_priv = dev->dev_private; local
1587 drm_radeon_private_t *dev_priv = dev->dev_private; local
1614 drm_radeon_private_t *dev_priv = dev->dev_private; local
1642 drm_radeon_private_t *dev_priv = dev->dev_private; local
1691 drm_radeon_private_t *dev_priv = dev->dev_private; local
1751 drm_radeon_private_t *dev_priv = dev->dev_private; local
1774 drm_radeon_private_t *dev_priv = dev->dev_private; local
1789 drm_radeon_private_t *dev_priv = dev->dev_private; local
1800 drm_radeon_private_t *dev_priv = dev->dev_private; local
1846 drm_radeon_private_t *dev_priv = dev->dev_private; local
1886 drm_radeon_private_t *dev_priv = dev->dev_private; local
1901 radeon_wait_ring(drm_radeon_private_t * dev_priv, int n) argument
1994 drm_radeon_private_t *dev_priv; local
2064 drm_radeon_private_t *dev_priv = dev->dev_private; local
2080 drm_radeon_private_t *dev_priv = dev->dev_private; local
2094 radeon_commit_ring(drm_radeon_private_t *dev_priv) argument
[all...]
H A Di915_suspend.c40 struct drm_i915_private *dev_priv = dev->dev_private; local
50 struct drm_i915_private *dev_priv = dev->dev_private; local
59 array = dev_priv->save_palette_a;
61 array = dev_priv->save_palette_b;
69 struct drm_i915_private *dev_priv = dev->dev_private; local
78 array = dev_priv->save_palette_a;
80 array = dev_priv->save_palette_b;
88 struct drm_i915_private *dev_priv = dev->dev_private; local
96 struct drm_i915_private *dev_priv = dev->dev_private; local
105 struct drm_i915_private *dev_priv local
114 struct drm_i915_private *dev_priv = dev->dev_private; local
122 struct drm_i915_private *dev_priv = dev->dev_private; local
180 struct drm_i915_private *dev_priv = dev->dev_private; local
233 struct drm_i915_private *dev_priv = dev->dev_private; local
369 struct drm_i915_private *dev_priv = dev->dev_private; local
[all...]
H A Dr128_cce.c89 drm_r128_private_t *dev_priv = dev->dev_private; local
96 static void r128_status(drm_r128_private_t * dev_priv) argument
117 static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv) argument
125 for (i = 0; i < dev_priv->usec_timeout; i++) {
138 static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries) argument
142 for (i = 0; i < dev_priv->usec_timeout; i++) {
155 static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv) argument
159 ret = r128_do_wait_for_fifo(dev_priv, 64);
163 for (i = 0; i < dev_priv->usec_timeout; i++) {
165 r128_do_pixcache_flush(dev_priv);
182 r128_cce_load_microcode(drm_r128_private_t * dev_priv) argument
202 r128_do_cce_flush(drm_r128_private_t * dev_priv) argument
212 r128_do_cce_idle(drm_r128_private_t * dev_priv) argument
238 r128_do_cce_start(drm_r128_private_t * dev_priv) argument
255 r128_do_cce_reset(drm_r128_private_t * dev_priv) argument
266 r128_do_cce_stop(drm_r128_private_t * dev_priv) argument
279 drm_r128_private_t *dev_priv = dev->dev_private; local
314 r128_cce_init_ring_buffer(struct drm_device * dev, drm_r128_private_t * dev_priv) argument
354 drm_r128_private_t *dev_priv; local
602 drm_r128_private_t *dev_priv = dev->dev_private; local
650 drm_r128_private_t *dev_priv = dev->dev_private; local
670 drm_r128_private_t *dev_priv = dev->dev_private; local
709 drm_r128_private_t *dev_priv = dev->dev_private; local
729 drm_r128_private_t *dev_priv = dev->dev_private; local
811 drm_r128_private_t *dev_priv = dev->dev_private; local
862 r128_wait_ring(drm_r128_private_t * dev_priv, int n) argument
[all...]
H A Dvia_dma.c64 dev_priv->dma_low +=8; \
72 dev_priv->dma_low += 8;
74 static void via_cmdbuf_start(drm_via_private_t * dev_priv);
75 static void via_cmdbuf_pause(drm_via_private_t * dev_priv);
76 static void via_cmdbuf_reset(drm_via_private_t * dev_priv);
77 static void via_cmdbuf_rewind(drm_via_private_t * dev_priv);
78 static int via_wait_idle(drm_via_private_t * dev_priv);
79 static void via_pad_cache(drm_via_private_t * dev_priv, int qwords);
85 static uint32_t via_cmdbuf_space(drm_via_private_t * dev_priv) argument
87 uint32_t agp_base = dev_priv
99 via_cmdbuf_lag(drm_via_private_t * dev_priv) argument
114 via_cmdbuf_wait(drm_via_private_t * dev_priv, unsigned int size) argument
145 via_check_dma(drm_via_private_t * dev_priv, unsigned int size) argument
165 drm_via_private_t *dev_priv = local
184 via_initialize(struct drm_device * dev, drm_via_private_t * dev_priv, drm_via_dma_init_t * init) argument
242 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
273 drm_via_private_t *dev_priv; local
326 drm_via_private_t *dev_priv = dev->dev_private; local
362 drm_via_private_t *dev_priv = dev->dev_private; local
400 via_align_buffer(drm_via_private_t * dev_priv, uint32_t * vb, int qw_count) argument
414 via_get_dma(drm_via_private_t * dev_priv) argument
424 via_hook_segment(drm_via_private_t * dev_priv, uint32_t pause_addr_hi, uint32_t pause_addr_lo, int no_pci_fire) argument
490 via_wait_idle(drm_via_private_t * dev_priv) argument
504 via_align_cmd(drm_via_private_t * dev_priv, uint32_t cmd_type, uint32_t addr, uint32_t * cmd_addr_hi, uint32_t * cmd_addr_lo, int skip_wait) argument
534 via_cmdbuf_start(drm_via_private_t * dev_priv) argument
593 via_pad_cache(drm_via_private_t * dev_priv, int qwords) argument
603 via_dummy_bitblt(drm_via_private_t * dev_priv) argument
611 via_cmdbuf_jump(drm_via_private_t * dev_priv) argument
670 via_cmdbuf_rewind(drm_via_private_t * dev_priv) argument
675 via_cmdbuf_flush(drm_via_private_t * dev_priv, uint32_t cmd_type) argument
683 via_cmdbuf_pause(drm_via_private_t * dev_priv) argument
688 via_cmdbuf_reset(drm_via_private_t * dev_priv) argument
703 drm_via_private_t *dev_priv; local
[all...]
H A Dradeon_irq.c43 drm_radeon_private_t *dev_priv = dev->dev_private; local
46 dev_priv->irq_enable_reg |= mask;
48 dev_priv->irq_enable_reg &= ~mask;
51 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
56 drm_radeon_private_t *dev_priv = dev->dev_private; local
59 dev_priv->r500_disp_irq_reg |= mask;
61 dev_priv->r500_disp_irq_reg &= ~mask;
64 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
69 drm_radeon_private_t *dev_priv = dev->dev_private; local
71 if ((dev_priv
104 drm_radeon_private_t *dev_priv = dev->dev_private; local
135 radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv, u32 *r500_disp_int) argument
191 drm_radeon_private_t *dev_priv = local
258 drm_radeon_private_t *dev_priv = dev->dev_private; local
276 drm_radeon_private_t *dev_priv = local
296 drm_radeon_private_t *dev_priv = dev->dev_private; local
325 drm_radeon_private_t *dev_priv = dev->dev_private; local
353 drm_radeon_private_t *dev_priv = dev->dev_private; local
368 drm_radeon_private_t *dev_priv = local
386 drm_radeon_private_t *dev_priv = local
402 drm_radeon_private_t *dev_priv = local
421 drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; local
428 drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; local
[all...]
H A Dmga_dma.c58 int mga_do_wait_for_idle(drm_mga_private_t * dev_priv) argument
64 for (i = 0; i < dev_priv->usec_timeout; i++) {
80 static int mga_do_dma_reset(drm_mga_private_t * dev_priv) argument
82 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
83 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
108 void mga_do_dma_flush(drm_mga_private_t * dev_priv) argument
110 drm_mga_primary_buffer_t *primary = &dev_priv->prim;
118 for (i = 0; i < dev_priv->usec_timeout; i++) {
130 tail = primary->tail + dev_priv->primary->offset;
154 DRM_DEBUG(" head = 0x%06lx\n", head - dev_priv
164 mga_do_dma_wrap_start(drm_mga_private_t * dev_priv) argument
205 mga_do_dma_wrap_end(drm_mga_private_t * dev_priv) argument
232 drm_mga_private_t *dev_priv = dev->dev_private; local
251 mga_freelist_init(struct drm_device * dev, drm_mga_private_t * dev_priv) argument
299 drm_mga_private_t *dev_priv = dev->dev_private; local
334 drm_mga_private_t *dev_priv = dev->dev_private; local
367 drm_mga_private_t *dev_priv = dev->dev_private; local
401 drm_mga_private_t *dev_priv; local
450 drm_mga_private_t *const dev_priv = local
620 drm_mga_private_t *const dev_priv = local
714 drm_mga_private_t *const dev_priv = local
781 const drm_mga_private_t *const dev_priv = local
807 drm_mga_private_t *dev_priv; local
955 drm_mga_private_t *dev_priv = dev->dev_private; local
1043 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
1076 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
1116 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
1170 drm_mga_private_t *dev_priv = dev->dev_private; local
[all...]
H A Di915_irq.c60 i915_enable_irq(drm_i915_private_t *dev_priv, u32 mask) argument
63 if ((dev_priv->irq_mask_reg & mask) != 0) {
64 dev_priv->irq_mask_reg &= ~mask;
65 I915_WRITE(IMR, dev_priv->irq_mask_reg);
71 i915_disable_irq(drm_i915_private_t *dev_priv, u32 mask) argument
74 if ((dev_priv->irq_mask_reg & mask) != mask) {
75 dev_priv->irq_mask_reg |= mask;
76 I915_WRITE(IMR, dev_priv->irq_mask_reg);
92 i915_enable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) argument
94 if ((dev_priv
105 i915_disable_pipestat(drm_i915_private_t *dev_priv, int pipe, u32 mask) argument
128 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
142 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
176 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
190 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
274 drm_i915_private_t *dev_priv = dev->dev_private; local
298 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
312 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
326 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
364 drm_i915_private_t *dev_priv = dev->dev_private; local
390 drm_i915_private_t *dev_priv = dev->dev_private; local
406 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
427 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
441 drm_i915_private_t *dev_priv = dev->dev_private; local
454 drm_i915_private_t *dev_priv = dev->dev_private; local
494 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
506 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
533 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
[all...]
H A Dvia_video.c35 void via_init_futex(drm_via_private_t * dev_priv) argument
42 DRM_INIT_WAITQUEUE(&(dev_priv->decoder_queue[i]));
43 XVMCLOCKPTR(dev_priv->sarea_priv, i)->lock = 0;
47 void via_cleanup_futex(drm_via_private_t * dev_priv) argument
51 void via_release_futex(drm_via_private_t * dev_priv, int context) argument
56 if (!dev_priv->sarea_priv)
60 lock = (volatile int *)XVMCLOCKPTR(dev_priv->sarea_priv, i);
64 DRM_WAKEUP(&(dev_priv->decoder_queue[i]));
75 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
76 drm_via_sarea_t *sAPriv = dev_priv
[all...]
H A Dr600_cp.c71 static int r600_do_wait_for_fifo(drm_radeon_private_t *dev_priv, int entries) argument
75 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
77 for (i = 0; i < dev_priv->usec_timeout; i++) {
79 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
96 static int r600_do_wait_for_idle(drm_radeon_private_t *dev_priv) argument
100 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
102 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
103 ret = r600_do_wait_for_fifo(dev_priv, 8);
105 ret = r600_do_wait_for_fifo(dev_priv, 16);
108 for (i = 0; i < dev_priv
149 drm_radeon_private_t *dev_priv = dev->dev_private; local
204 drm_radeon_private_t *dev_priv = dev->dev_private; local
219 drm_radeon_private_t *dev_priv = dev->dev_private; local
283 r600_cp_load_microcode(drm_radeon_private_t *dev_priv) argument
361 drm_radeon_private_t *dev_priv = dev->dev_private; local
412 r700_cp_load_microcode(drm_radeon_private_t *dev_priv) argument
466 r600_test_writeback(drm_radeon_private_t *dev_priv) argument
511 drm_radeon_private_t *dev_priv = dev->dev_private; local
667 r600_gfx_init(struct drm_device *dev, drm_radeon_private_t *dev_priv) argument
1213 r700_gfx_init(struct drm_device *dev, drm_radeon_private_t *dev_priv) argument
1607 r600_cp_init_ring_buffer(struct drm_device *dev, drm_radeon_private_t *dev_priv, struct drm_file *file_priv) argument
1763 drm_radeon_private_t *dev_priv = dev->dev_private; local
1808 drm_radeon_private_t *dev_priv = dev->dev_private; local
2109 drm_radeon_private_t *dev_priv = dev->dev_private; local
2127 r600_do_cp_idle(drm_radeon_private_t *dev_priv) argument
2148 r600_do_cp_start(drm_radeon_private_t *dev_priv) argument
2176 r600_do_cp_reset(drm_radeon_private_t *dev_priv) argument
2187 r600_do_cp_stop(drm_radeon_private_t *dev_priv) argument
2203 drm_radeon_private_t *dev_priv = dev->dev_private; local
2239 drm_radeon_private_t *dev_priv = dev->dev_private; local
2300 drm_radeon_private_t *dev_priv = dev->dev_private; local
[all...]
H A Dmga_irq.c44 const drm_mga_private_t *const dev_priv = local
52 return atomic_read(&dev_priv->vbl_received);
59 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
68 atomic_inc(&dev_priv->vbl_received);
88 atomic_inc(&dev_priv->last_fence_retired);
89 DRM_WAKEUP(&dev_priv->fence_queue);
100 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
130 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
138 DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
139 (((cur_fence = atomic_read(&dev_priv
152 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
162 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
175 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private; local
[all...]
H A Dvia_irq.c104 drm_via_private_t *dev_priv = dev->dev_private; local
108 return atomic_read(&dev_priv->vbl_received);
114 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
118 drm_via_irq_t *cur_irq = dev_priv->via_irqs;
123 atomic_inc(&dev_priv->vbl_received);
124 if (!(atomic_read(&dev_priv->vbl_received) & 0x0F)) {
126 if (dev_priv->last_vblank_valid) {
127 dev_priv->usec_per_vblank =
129 &dev_priv->last_vblank) >> 4;
131 dev_priv
166 viadrv_acknowledge_irqs(drm_via_private_t * dev_priv) argument
180 drm_via_private_t *dev_priv = dev->dev_private; local
199 drm_via_private_t *dev_priv = dev->dev_private; local
212 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
264 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
313 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
333 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
355 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
[all...]
H A Dvia_mm.c43 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
46 ret = drm_sman_set_range(&dev_priv->sman, VIA_MEM_AGP, 0,
53 dev_priv->agp_initialized = 1;
54 dev_priv->agp_offset = agp->offset;
63 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
66 ret = drm_sman_set_range(&dev_priv->sman, VIA_MEM_VIDEO, 0,
73 dev_priv->vram_initialized = 1;
74 dev_priv->vram_offset = fb->offset;
84 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
86 via_release_futex(dev_priv, contex
103 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
119 drm_via_private_t *dev_priv = (drm_via_private_t *) dev->dev_private; local
155 drm_via_private_t *dev_priv = dev->dev_private; local
169 drm_via_private_t *dev_priv = dev->dev_private; local
[all...]
H A Dmach64_dma.c57 * \param dev_priv pointer to device private data structure.
63 int mach64_do_wait_for_fifo(drm_mach64_private_t *dev_priv, int entries) argument
67 for (i = 0; i < dev_priv->usec_timeout; i++) {
81 int mach64_do_wait_for_idle(drm_mach64_private_t *dev_priv) argument
85 ret = mach64_do_wait_for_fifo(dev_priv, 16);
89 for (i = 0; i < dev_priv->usec_timeout; i++) {
96 mach64_dump_ring_info(dev_priv);
111 * \param dev_priv pointer to device private data structure.
119 int mach64_wait_ring(drm_mach64_private_t *dev_priv, int n) argument
121 drm_mach64_descriptor_ring_t *ring = &dev_priv
145 mach64_ring_idle(drm_mach64_private_t *dev_priv) argument
180 mach64_ring_reset(drm_mach64_private_t *dev_priv) argument
198 mach64_do_dma_flush(drm_mach64_private_t *dev_priv) argument
210 mach64_do_dma_idle(drm_mach64_private_t *dev_priv) argument
232 mach64_do_engine_reset(drm_mach64_private_t *dev_priv) argument
276 mach64_dump_engine_info(drm_mach64_private_t *dev_priv) argument
417 mach64_dump_buf_info(drm_mach64_private_t *dev_priv, struct drm_buf *buf) argument
477 mach64_dump_ring_info(drm_mach64_private_t *dev_priv) argument
712 mach64_add_buf_to_ring(drm_mach64_private_t *dev_priv, drm_mach64_freelist_t *entry) argument
759 mach64_add_hostdata_buf_to_ring(drm_mach64_private_t *dev_priv, drm_mach64_freelist_t *entry) argument
826 drm_mach64_private_t *dev_priv = dev->dev_private; local
1012 drm_mach64_private_t *dev_priv; local
1226 mach64_do_dispatch_pseudo_dma(drm_mach64_private_t *dev_priv) argument
1385 drm_mach64_private_t *dev_priv = dev->dev_private; local
1436 drm_mach64_private_t *dev_priv = dev->dev_private; local
1448 drm_mach64_private_t *dev_priv = dev->dev_private; local
1460 drm_mach64_private_t *dev_priv = dev->dev_private; local
1479 drm_mach64_private_t *dev_priv = dev->dev_private; local
1503 drm_mach64_private_t *dev_priv = dev->dev_private; local
1531 mach64_do_release_used_buffers(drm_mach64_private_t *dev_priv) argument
1558 mach64_do_reclaim_completed(drm_mach64_private_t *dev_priv) argument
1631 mach64_freelist_get(drm_mach64_private_t *dev_priv) argument
1677 mach64_freelist_put(drm_mach64_private_t *dev_priv, struct drm_buf *copy_buf) argument
1716 drm_mach64_private_t *dev_priv = dev->dev_private; local
[all...]
H A Di915_dma.c44 drm_i915_private_t *dev_priv = dev->dev_private; local
45 drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
61 if (dev_priv->sarea_priv)
62 dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
84 drm_i915_private_t *dev_priv = dev->dev_private; local
88 dev_priv->status_page_dmah =
91 if (!dev_priv->status_page_dmah) {
95 dev_priv->hw_status_page = dev_priv->status_page_dmah->vaddr;
96 dev_priv
111 drm_i915_private_t *dev_priv = dev->dev_private; local
128 drm_i915_private_t *dev_priv = dev->dev_private; local
143 drm_i915_private_t *dev_priv = dev->dev_private; local
167 drm_i915_private_t *dev_priv = dev->dev_private; local
223 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
357 drm_i915_private_t *dev_priv = dev->dev_private; local
398 drm_i915_private_t *dev_priv = dev->dev_private; local
439 drm_i915_private_t *dev_priv = dev->dev_private; local
490 drm_i915_private_t *dev_priv = dev->dev_private; local
540 drm_i915_private_t *dev_priv = dev->dev_private; local
594 drm_i915_private_t *dev_priv = dev->dev_private; local
615 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
664 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
734 drm_i915_private_t *dev_priv = dev->dev_private; local
776 drm_i915_private_t *dev_priv = dev->dev_private; local
804 drm_i915_private_t *dev_priv = dev->dev_private; local
845 struct drm_i915_private *dev_priv = dev->dev_private; local
925 struct drm_i915_private *dev_priv = dev->dev_private; local
962 drm_i915_private_t *dev_priv = dev->dev_private; local
977 drm_i915_private_t *dev_priv = dev->dev_private; local
[all...]
H A Dmach64_irq.c49 drm_mach64_private_t *dev_priv = dev->dev_private; local
67 atomic_inc(&dev_priv->vbl_received);
76 const drm_mach64_private_t *const dev_priv = dev->dev_private; local
81 return atomic_read(&dev_priv->vbl_received);
86 drm_mach64_private_t *dev_priv = dev->dev_private; local
120 drm_mach64_private_t *dev_priv = dev->dev_private; local
138 drm_mach64_private_t *dev_priv = dev->dev_private; local
154 drm_mach64_private_t *dev_priv = dev->dev_private; local
155 if (!dev_priv)
H A Dmga_warp.c48 dev_priv->warp_pipe_phys[where] = pcbase; \
83 unsigned int mga_warp_microcode_size(const drm_mga_private_t * dev_priv) argument
85 switch (dev_priv->chipset) {
92 DRM_ERROR("Unknown chipset value: 0x%x\n", dev_priv->chipset);
97 static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv) argument
99 unsigned char *vcbase = dev_priv->warp->virtual;
100 unsigned long pcbase = dev_priv->warp->offset;
102 memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
125 static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv) argument
144 mga_warp_install_microcode(drm_mga_private_t * dev_priv) argument
168 mga_warp_init(drm_mga_private_t * dev_priv) argument
[all...]
H A Dmga_state.c48 static void mga_emit_clip_rect(drm_mga_private_t * dev_priv, argument
51 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
53 unsigned int pitch = dev_priv->front_pitch;
60 if (dev_priv->chipset >= MGA_CARD_TYPE_G400) {
73 static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv) argument
75 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
87 MGA_WFLAG, ctx->wflag, MGA_ZORG, dev_priv->depth_offset);
96 static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv) argument
98 drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
112 MGA_ZORG, dev_priv
127 mga_g200_emit_tex0(drm_mga_private_t * dev_priv) argument
158 mga_g400_emit_tex0(drm_mga_private_t * dev_priv) argument
202 mga_g400_emit_tex1(drm_mga_private_t * dev_priv) argument
243 mga_g200_emit_pipe(drm_mga_private_t * dev_priv) argument
272 mga_g400_emit_pipe(drm_mga_private_t * dev_priv) argument
353 mga_g200_emit_state(drm_mga_private_t * dev_priv) argument
374 mga_g400_emit_state(drm_mga_private_t * dev_priv) argument
407 mga_verify_context(drm_mga_private_t * dev_priv) argument
426 mga_verify_tex(drm_mga_private_t * dev_priv, int unit) argument
443 mga_verify_state(drm_mga_private_t * dev_priv) argument
472 mga_verify_iload(drm_mga_private_t * dev_priv, unsigned int dstorg, unsigned int length) argument
491 mga_verify_blit(drm_mga_private_t * dev_priv, unsigned int srcorg, unsigned int dstorg) argument
508 drm_mga_private_t *dev_priv = dev->dev_private; local
598 drm_mga_private_t *dev_priv = dev->dev_private; local
655 drm_mga_private_t *dev_priv = dev->dev_private; local
703 drm_mga_private_t *dev_priv = dev->dev_private; local
752 drm_mga_private_t *dev_priv = dev->dev_private; local
804 drm_mga_private_t *dev_priv = dev->dev_private; local
869 drm_mga_private_t *dev_priv = dev->dev_private; local
891 drm_mga_private_t *dev_priv = dev->dev_private; local
912 drm_mga_private_t *dev_priv = dev->dev_private; local
947 drm_mga_private_t *dev_priv = dev->dev_private; local
983 drm_mga_private_t *dev_priv = dev->dev_private; local
1022 drm_mga_private_t *dev_priv = dev->dev_private; local
1048 drm_mga_private_t *dev_priv = dev->dev_private; local
1080 drm_mga_private_t *dev_priv = dev->dev_private; local
1110 drm_mga_private_t *dev_priv = dev->dev_private; local
[all...]
/freebsd-10.0-release/sys/dev/drm2/radeon/
H A Dradeon_cp.c57 static void radeon_do_cp_start(drm_radeon_private_t * dev_priv);
59 u32 radeon_read_ring_rptr(drm_radeon_private_t *dev_priv, u32 off) argument
63 if (dev_priv->flags & RADEON_IS_AGP) {
64 val = DRM_READ32(dev_priv->ring_rptr, off);
67 dev_priv->ring_rptr->handle) +
74 u32 radeon_get_ring_head(drm_radeon_private_t *dev_priv) argument
76 if (dev_priv->writeback_works)
77 return radeon_read_ring_rptr(dev_priv, 0);
79 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_R600)
86 void radeon_write_ring_rptr(drm_radeon_private_t *dev_priv, u3 argument
95 radeon_set_ring_head(drm_radeon_private_t *dev_priv, u32 val) argument
100 radeon_get_scratch(drm_radeon_private_t *dev_priv, int index) argument
117 R500_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
126 RS480_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
135 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
144 RS600_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
153 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) argument
164 radeon_read_fb_location(drm_radeon_private_t *dev_priv) argument
184 radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc) argument
203 radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_loc) argument
225 radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) argument
260 radeon_enable_bm(struct drm_radeon_private *dev_priv) argument
281 drm_radeon_private_t *dev_priv = dev->dev_private; local
287 RADEON_READ_PCIE(drm_radeon_private_t *dev_priv, int addr) argument
294 radeon_status(drm_radeon_private_t * dev_priv) argument
320 radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv) argument
351 radeon_do_wait_for_fifo(drm_radeon_private_t * dev_priv, int entries) argument
375 radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv) argument
406 drm_radeon_private_t *dev_priv = dev->dev_private; local
469 radeon_cp_init_microcode(drm_radeon_private_t *dev_priv) argument
537 radeon_cp_load_microcode(drm_radeon_private_t *dev_priv) argument
561 radeon_do_cp_flush(drm_radeon_private_t * dev_priv) argument
574 radeon_do_cp_idle(drm_radeon_private_t * dev_priv) argument
593 radeon_do_cp_start(drm_radeon_private_t * dev_priv) argument
636 radeon_do_cp_reset(drm_radeon_private_t * dev_priv) argument
651 radeon_do_cp_stop(drm_radeon_private_t * dev_priv) argument
675 drm_radeon_private_t *dev_priv = dev->dev_private; local
738 radeon_cp_init_ring_buffer(struct drm_device * dev, drm_radeon_private_t *dev_priv, struct drm_file *file_priv) argument
855 radeon_test_writeback(drm_radeon_private_t * dev_priv) argument
899 radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on) argument
970 rs600_set_igpgart(drm_radeon_private_t *dev_priv, int on) argument
1045 radeon_set_pciegart(drm_radeon_private_t * dev_priv, int on) argument
1075 radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on) argument
1122 radeon_setup_pcigart_surface(drm_radeon_private_t *dev_priv) argument
1165 drm_radeon_private_t *dev_priv = dev->dev_private; local
1549 drm_radeon_private_t *dev_priv = dev->dev_private; local
1609 drm_radeon_private_t *dev_priv = dev->dev_private; local
1643 drm_radeon_private_t *dev_priv = dev->dev_private; local
1671 drm_radeon_private_t *dev_priv = dev->dev_private; local
1699 drm_radeon_private_t *dev_priv = dev->dev_private; local
1748 drm_radeon_private_t *dev_priv = dev->dev_private; local
1822 drm_radeon_private_t *dev_priv = dev->dev_private; local
1845 drm_radeon_private_t *dev_priv = dev->dev_private; local
1860 drm_radeon_private_t *dev_priv = dev->dev_private; local
1871 drm_radeon_private_t *dev_priv = dev->dev_private; local
1917 drm_radeon_private_t *dev_priv = dev->dev_private; local
1957 drm_radeon_private_t *dev_priv = dev->dev_private; local
1972 radeon_wait_ring(drm_radeon_private_t * dev_priv, int n) argument
2065 drm_radeon_private_t *dev_priv; local
2181 drm_radeon_private_t *dev_priv = dev->dev_private; local
2197 drm_radeon_private_t *dev_priv = dev->dev_private; local
2209 radeon_commit_ring(drm_radeon_private_t *dev_priv) argument
[all...]
H A Dradeon_irq.c42 drm_radeon_private_t *dev_priv = dev->dev_private; local
45 dev_priv->irq_enable_reg |= mask;
47 dev_priv->irq_enable_reg &= ~mask;
50 RADEON_WRITE(RADEON_GEN_INT_CNTL, dev_priv->irq_enable_reg);
55 drm_radeon_private_t *dev_priv = dev->dev_private; local
58 dev_priv->r500_disp_irq_reg |= mask;
60 dev_priv->r500_disp_irq_reg &= ~mask;
63 RADEON_WRITE(R500_DxMODE_INT_MASK, dev_priv->r500_disp_irq_reg);
68 drm_radeon_private_t *dev_priv = dev->dev_private; local
70 if ((dev_priv
103 drm_radeon_private_t *dev_priv = dev->dev_private; local
134 radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv, u32 *r500_disp_int) argument
188 drm_radeon_private_t *dev_priv = local
226 drm_radeon_private_t *dev_priv = dev->dev_private; local
244 drm_radeon_private_t *dev_priv = local
261 drm_radeon_private_t *dev_priv = dev->dev_private; local
290 drm_radeon_private_t *dev_priv = dev->dev_private; local
318 drm_radeon_private_t *dev_priv = dev->dev_private; local
336 drm_radeon_private_t *dev_priv = local
354 drm_radeon_private_t *dev_priv = local
372 drm_radeon_private_t *dev_priv = local
389 drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; local
396 drm_radeon_private_t *dev_priv = (drm_radeon_private_t *) dev->dev_private; local
[all...]
H A Dr600_cp.c79 static int r600_do_wait_for_fifo(drm_radeon_private_t *dev_priv, int entries) argument
83 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
85 for (i = 0; i < dev_priv->usec_timeout; i++) {
87 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
104 static int r600_do_wait_for_idle(drm_radeon_private_t *dev_priv) argument
108 dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
110 if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV770)
111 ret = r600_do_wait_for_fifo(dev_priv, 8);
113 ret = r600_do_wait_for_fifo(dev_priv, 16);
116 for (i = 0; i < dev_priv
161 drm_radeon_private_t *dev_priv = dev->dev_private; local
219 drm_radeon_private_t *dev_priv = dev->dev_private; local
234 drm_radeon_private_t *dev_priv = dev->dev_private; local
297 r600_cp_init_microcode(drm_radeon_private_t *dev_priv) argument
375 r600_cp_load_microcode(drm_radeon_private_t *dev_priv) argument
418 drm_radeon_private_t *dev_priv = dev->dev_private; local
468 r700_cp_load_microcode(drm_radeon_private_t *dev_priv) argument
509 r600_test_writeback(drm_radeon_private_t *dev_priv) argument
558 drm_radeon_private_t *dev_priv = dev->dev_private; local
713 r600_gfx_init(struct drm_device *dev, drm_radeon_private_t *dev_priv) argument
1165 r700_get_tile_pipe_to_backend_map(drm_radeon_private_t *dev_priv, u32 num_tile_pipes, u32 num_backends, u32 backend_disable_mask) argument
1339 r700_gfx_init(struct drm_device *dev, drm_radeon_private_t *dev_priv) argument
1765 r600_cp_init_ring_buffer(struct drm_device *dev, drm_radeon_private_t *dev_priv, struct drm_file *file_priv) argument
1923 drm_radeon_private_t *dev_priv = dev->dev_private; local
1968 drm_radeon_private_t *dev_priv = dev->dev_private; local
2273 drm_radeon_private_t *dev_priv = dev->dev_private; local
2291 r600_do_cp_idle(drm_radeon_private_t *dev_priv) argument
2312 r600_do_cp_start(drm_radeon_private_t *dev_priv) argument
2340 r600_do_cp_reset(drm_radeon_private_t *dev_priv) argument
2351 r600_do_cp_stop(drm_radeon_private_t *dev_priv) argument
2367 drm_radeon_private_t *dev_priv = dev->dev_private; local
2403 drm_radeon_private_t *dev_priv = dev->dev_private; local
2466 drm_radeon_private_t *dev_priv = dev->dev_private; local
2554 r600_cs_id_emit(drm_radeon_private_t *dev_priv, u32 *id) argument
2586 drm_radeon_private_t *dev_priv = dev->dev_private; local
2598 struct drm_radeon_private *dev_priv = dev->dev_private; local
2640 struct drm_radeon_private *dev_priv = dev->dev_private; local
[all...]
/freebsd-10.0-release/sys/dev/drm2/i915/
H A Di915_suspend.c37 struct drm_i915_private *dev_priv = dev->dev_private; local
54 struct drm_i915_private *dev_priv = dev->dev_private; local
66 array = dev_priv->save_palette_a;
68 array = dev_priv->save_palette_b;
76 struct drm_i915_private *dev_priv = dev->dev_private; local
88 array = dev_priv->save_palette_a;
90 array = dev_priv->save_palette_b;
98 struct drm_i915_private *dev_priv = dev->dev_private; local
106 struct drm_i915_private *dev_priv = dev->dev_private; local
115 struct drm_i915_private *dev_priv local
124 struct drm_i915_private *dev_priv = dev->dev_private; local
132 struct drm_i915_private *dev_priv = dev->dev_private; local
190 struct drm_i915_private *dev_priv = dev->dev_private; local
243 struct drm_i915_private *dev_priv = dev->dev_private; local
405 struct drm_i915_private *dev_priv = dev->dev_private; local
611 struct drm_i915_private *dev_priv = dev->dev_private; local
703 struct drm_i915_private *dev_priv = dev->dev_private; local
802 struct drm_i915_private *dev_priv = dev->dev_private; local
852 struct drm_i915_private *dev_priv = dev->dev_private; local
[all...]
H A Di915_dma.c43 * - dev_priv->max_delay
44 * - dev_priv->min_delay
45 * - dev_priv->fmax
46 * - dev_priv->gpu_busy
57 drm_i915_private_t *dev_priv = dev->dev_private; local
60 addr = dev_priv->status_page_dmah->busaddr;
62 addr |= (dev_priv->status_page_dmah->busaddr >> 28) & 0xf0;
72 drm_i915_private_t *dev_priv = dev->dev_private; local
73 struct intel_ring_buffer *ring = LP_RING(dev_priv);
82 dev_priv
107 drm_i915_private_t *dev_priv = dev->dev_private; local
127 drm_i915_private_t *dev_priv = dev->dev_private; local
156 drm_i915_private_t *dev_priv = dev->dev_private; local
179 drm_i915_private_t *dev_priv = dev->dev_private; local
224 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
354 drm_i915_private_t *dev_priv = dev->dev_private; local
407 drm_i915_private_t *dev_priv = dev->dev_private; local
449 drm_i915_private_t *dev_priv = dev->dev_private; local
501 drm_i915_private_t *dev_priv = dev->dev_private; local
555 drm_i915_private_t *dev_priv = dev->dev_private; local
633 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
682 drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; local
753 drm_i915_private_t *dev_priv = dev->dev_private; local
831 drm_i915_private_t *dev_priv = dev->dev_private; local
866 drm_i915_private_t *dev_priv = dev->dev_private; local
928 struct drm_i915_private *dev_priv = dev->dev_private; local
999 struct drm_i915_private *dev_priv = dev->dev_private; local
1050 struct drm_i915_private *dev_priv; local
1073 drm_i915_private_t *dev_priv; local
1120 drm_i915_private_t *dev_priv; local
1162 drm_i915_private_t *dev_priv; local
1199 struct drm_i915_private *dev_priv = dev->dev_private; local
1322 struct drm_i915_private *dev_priv = dev->dev_private; local
1422 drm_i915_private_t *dev_priv = dev->dev_private; local
1556 drm_i915_private_t *dev_priv = dev->dev_private; local
1595 drm_i915_private_t *dev_priv = dev->dev_private; local
1675 i915_chipset_val(struct drm_i915_private *dev_priv) argument
1726 i915_mch_val(struct drm_i915_private *dev_priv) argument
1741 pvid_to_extvid(struct drm_i915_private *dev_priv, u8 pxvid) argument
1882 i915_update_gfx_val(struct drm_i915_private *dev_priv) argument
1919 i915_gfx_val(struct drm_i915_private *dev_priv) argument
1962 struct drm_i915_private *dev_priv; local
1988 struct drm_i915_private *dev_priv; local
2015 struct drm_i915_private *dev_priv; local
2041 struct drm_i915_private *dev_priv; local
2065 struct drm_i915_private *dev_priv; local
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H A Dintel_panel.c65 struct drm_i915_private *dev_priv = dev->dev_private; local
119 dev_priv->pch_pf_pos = (x << 16) | y;
120 dev_priv->pch_pf_size = (width << 16) | height;
125 struct drm_i915_private *dev_priv = dev->dev_private; local
136 static u32 i915_read_blc_pwm_ctl(struct drm_i915_private *dev_priv) argument
142 if (HAS_PCH_SPLIT(dev_priv->dev)) {
144 if (dev_priv->saveBLC_PWM_CTL2 == 0) {
145 dev_priv->saveBLC_PWM_CTL2 = val;
148 dev_priv->saveBLC_PWM_CTL2);
149 val = dev_priv
170 struct drm_i915_private *dev_priv = dev->dev_private; local
202 struct drm_i915_private *dev_priv = dev->dev_private; local
226 struct drm_i915_private *dev_priv = dev->dev_private; local
233 struct drm_i915_private *dev_priv = dev->dev_private; local
259 struct drm_i915_private *dev_priv = dev->dev_private; local
268 struct drm_i915_private *dev_priv = dev->dev_private; local
276 struct drm_i915_private *dev_priv = dev->dev_private; local
287 struct drm_i915_private *dev_priv = dev->dev_private; local
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