Searched refs:VRM (Results 1 - 22 of 22) sorted by relevance

/freebsd-10.0-release/contrib/llvm/lib/CodeGen/
H A DAllocationOrder.cpp30 const VirtRegMap &VRM,
33 const MachineFunction &MF = VRM.getMachineFunction();
34 const TargetRegisterInfo *TRI = &VRM.getTargetRegInfo();
36 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM);
29 AllocationOrder(unsigned VirtReg, const VirtRegMap &VRM, const RegisterClassInfo &RegClassInfo) argument
H A DRegAllocBase.h63 VirtRegMap *VRM; member in class:llvm::RegAllocBase
68 RegAllocBase(): TRI(0), MRI(0), VRM(0), LIS(0), Matrix(0) {}
H A DLiveDebugVariables.h54 /// @param VRM Rename virtual registers according to map.
55 void emitDebugValues(VirtRegMap *VRM);
H A DRegAllocBase.cpp58 VRM = &vrm;
85 assert(!VRM->hasPhys(VirtReg->reg) && "Register already assigned");
121 VRM->assignVirt2Phys(VirtReg->reg,
132 assert(!VRM->hasPhys(SplitVirtReg->reg) && "Register already assigned");
H A DLiveRegMatrix.cpp53 VRM = &getAnalysis<VirtRegMap>();
75 assert(!VRM->hasPhys(VirtReg.reg) && "Duplicate VirtReg assignment");
76 VRM->assignVirt2Phys(VirtReg.reg, PhysReg);
87 unsigned PhysReg = VRM->getPhys(VirtReg.reg);
90 VRM->clearVirt(VirtReg.reg);
H A DAllocationOrder.h36 /// @param VRM Virtual register map for function.
39 const VirtRegMap &VRM,
H A DVirtRegMap.cpp161 VirtRegMap *VRM; member in class:__anon2243::VirtRegRewriter
209 VRM = &getAnalysis<VirtRegMap>();
213 DEBUG(VRM->dump());
216 LIS->addKillFlags(VRM);
225 getAnalysis<LiveDebugVariables>().emitDebugValues(VRM);
229 VRM->clearAllVirt();
247 unsigned PhysReg = VRM->getPhys(VirtReg);
287 unsigned PhysReg = VRM->getPhys(VirtReg);
H A DRegAllocBasic.cpp195 if (!VRM->hasPhys(Spill.reg))
203 LiveRangeEdit LRE(&Spill, SplitVRegs, *MF, *LIS, VRM);
227 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInfo);
262 LiveRangeEdit LRE(&VirtReg, SplitVRegs, *MF, *LIS, VRM);
279 SpillerInstance.reset(createInlineSpiller(*this, *MF, *VRM));
284 DEBUG(dbgs() << "Post alloc VirtRegMap:\n" << *VRM << "\n");
H A DLiveRangeEdit.cpp36 if (VRM) {
37 VRM->grow();
38 VRM->setIsSplitFromReg(VReg, VRM->getOriginal(OldReg));
356 bool IsOriginal = VRM && VRM->getOriginal(LI->reg) == LI->reg;
365 VRM->setIsSplitFromReg(Dups.back()->reg, 0);
H A DLiveDebugVariables.cpp256 void rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI);
259 void emitDebugValues(VirtRegMap *VRM,
348 void emitDebugValues(VirtRegMap *VRM);
860 UserValue::rewriteLocations(VirtRegMap &VRM, const TargetRegisterInfo &TRI) { argument
870 if (VRM.isAssignedReg(VirtReg) &&
871 TargetRegisterInfo::isPhysicalRegister(VRM.getPhys(VirtReg))) {
875 Loc.substPhysReg(VRM.getPhys(VirtReg), TRI);
876 } else if (VRM.getStackSlot(VirtReg) != VirtRegMap::NO_STACK_SLOT) {
878 Loc = MachineOperand::CreateFI(VRM.getStackSlot(VirtReg));
939 void UserValue::emitDebugValues(VirtRegMap *VRM, LiveInterval argument
972 emitDebugValues(VirtRegMap *VRM) argument
983 emitDebugValues(VirtRegMap *VRM) argument
[all...]
H A DTargetRegisterInfo.cpp258 const VirtRegMap *VRM) const {
269 if (VRM && isVirtualRegister(Phys))
270 Phys = VRM->getPhys(Phys);
H A DSplitKit.h44 const VirtRegMap &VRM; member in class:llvm::SplitAnalysis
213 VirtRegMap &VRM; member in class:llvm::SplitEditor
H A DRegAllocGreedy.cpp353 if (VRM->hasPhys(VirtReg)) {
363 if (!VRM->hasPhys(VirtReg))
415 if (VRM->hasKnownPreference(Reg))
565 bool BreaksHint = VRM->hasPreferredPhys(Intf->reg);
609 if (!VRM->hasPhys(Intf->reg))
1206 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
1254 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
1309 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
1619 LiveRangeEdit LREdit(&VirtReg, NewVRegs, *MF, *LIS, VRM, this);
1710 AllocationOrder Order(VirtReg.reg, *VRM, RegClassInf
[all...]
H A DInlineSpiller.cpp61 VirtRegMap &VRM; member in class:__anon2158::InlineSpiller
145 VRM(vrm),
309 VRM.getOriginal(Reg) == Original;
1230 StackSlot = VRM.assignVirt2StackSlot(Original);
1237 VRM.assignVirt2StackSlot(Edit->getReg(), StackSlot);
1277 Original = VRM.getOriginal(edit.getReg());
1278 StackSlot = VRM.getStackSlot(Original);
H A DSplitKit.cpp46 VRM(vrm),
300 unsigned OrigReg = VRM.getOriginal(CurLI->reg);
329 : SA(sa), LIS(lis), VRM(vrm),
348 LRCalc[0].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT,
351 LRCalc[1].reset(&VRM.getMachineFunction(), LIS.getSlotIndexes(), &MDT,
1122 Edit->calculateRegClassAndHint(VRM.getMachineFunction(), SA.Loops);
1193 MachineBasicBlock *MBB = VRM.getMachineFunction().getBlockNumbered(MBBNum);
H A DLiveIntervalAnalysis.cpp506 void LiveIntervals::addKillFlags(const VirtRegMap *VRM) { argument
521 for (MCRegUnitIterator Units(VRM->getPhys(Reg), TRI); Units.isValid();
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DLiveRangeEdit.h62 VirtRegMap *VRM; member in class:llvm::LiveRangeEdit
109 MRI(MF.getRegInfo()), LIS(lis), VRM(vrm),
H A DVirtRegMap.h184 inline raw_ostream &operator<<(raw_ostream &OS, const VirtRegMap &VRM) { argument
185 VRM.print(OS);
H A DLiveRegMatrix.h44 VirtRegMap *VRM; member in class:llvm::LiveRegMatrix
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMBaseRegisterInfo.cpp186 const VirtRegMap *VRM) const {
199 TargetRegisterInfo::getRegAllocationHints(VirtReg, Order, Hints, MF, VRM);
207 if (VRM && VRM->hasPhys(Hint.second)) {
208 PairedPhys = getPairedGPR(VRM->getPhys(Hint.second), Odd, this);
H A DARMBaseRegisterInfo.h119 const VirtRegMap *VRM) const;
/freebsd-10.0-release/contrib/llvm/include/llvm/Target/
H A DTargetRegisterInfo.h627 const VirtRegMap *VRM = 0) const;

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