/freebsd-10.0-release/lib/libmd/ |
H A D | sha256c.c | 81 #define ROTR(x, n) ((x >> n) | (x << (32 - n))) macro 82 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22)) 83 #define S1(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25)) 84 #define s0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3)) 85 #define s1(x) (ROTR( [all...] |
H A D | sha512c.c | 81 #define ROTR(x, n) ((x >> n) | (x << (64 - n))) macro 82 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39)) 83 #define S1(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41)) 84 #define s0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7)) 85 #define s1(x) (ROTR( [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/ |
H A D | ARMSelectionDAGInfo.h | 29 case ISD::ROTR: return ARM_AM::ror; 30 //case ISD::ROTL: // Only if imm -> turn into ROTR.
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H A D | ARMISelLowering.cpp | 9324 return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, N0, N1);
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/freebsd-10.0-release/crypto/openssl/crypto/sha/ |
H A D | sha512.c | 316 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro 346 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro 354 # define ROTR(a,n) _rotr64((a),n) macro 389 #ifndef ROTR 390 #define ROTR(x,s) (((x)>>s) | (x)<<(64-s)) macro 393 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39)) 394 #define Sigma1(x) (ROTR((x),14) ^ ROTR(( [all...] |
/freebsd-10.0-release/crypto/openssl/crypto/sha/asm/ |
H A D | sha512-ia64.pl | 220 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14) 453 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14) 459 _rotr r8=$t1,$Sigma1[1] } // ROTR(e,18) 463 _rotr r9=$t1,$Sigma1[2] } // ROTR(e,41) 467 _rotr r10=$t0,$Sigma0[0] } // ROTR(a,28) 471 _rotr r11=$t0,$Sigma0[1] } // ROTR(a,34) 475 _rotr r8=$t0,$Sigma0[2] } // ROTR(a,39) 493 _rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1) 497 _rotr r9=X[15-1],$sigma0[1] } // ROTR(s0,8) 502 _rotr r10=X[15-14],$sigma1[0] };;// ROTR(s [all...] |
H A D | sha512-armv4.pl | 75 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41)) 130 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39)) 305 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7)) 322 @ sigma1(x) (ROTR((x),19) ^ ROTR(( [all...] |
/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/ |
H A D | ISDOpcodes.h | 318 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
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/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelLowering.cpp | 117 setOperationAction(ISD::ROTR, MVT::i64, Legal); 120 setOperationAction(ISD::ROTR, MVT::i64, Expand); 124 setOperationAction(ISD::ROTR, MVT::i32, Legal); 127 setOperationAction(ISD::ROTR, MVT::i32, Expand); 131 setOperationAction(ISD::ROTR, MVT::i16, Expand); 133 setOperationAction(ISD::ROTR, MVT::i8, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SelectionDAGDumper.cpp | 175 case ISD::ROTR: return "rotr";
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H A D | LegalizeVectorOps.cpp | 212 case ISD::ROTR:
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H A D | SelectionDAG.cpp | 2217 case ISD::ROTR: 2222 if (Op.getOpcode() == ISD::ROTR) 2779 case ISD::ROTR: 2914 case ISD::ROTR: 6148 case ISD::ROTR:
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H A D | DAGCombiner.cpp | 3035 if (TLI.isOperationLegalOrCustom(ISD::ROTR, VT)) 3036 return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, BSwap, ShAmt); 3227 bool HasROTR = TLI.isOperationLegalOrCustom(ISD::ROTR, VT); 3268 SDValue Rot = DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT, 3302 return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT, LHSShiftArg, 3315 return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT, LHSShiftArg, 3341 return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT, 3355 return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT,
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H A D | LegalizeIntegerTypes.cpp | 799 case ISD::ROTR: Res = PromoteIntOp_Shift(N); break; 2474 case ISD::ROTR: Res = ExpandIntOp_Shift(N); break;
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H A D | LegalizeDAG.cpp | 1277 case ISD::ROTR:
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/freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 102 setOperationAction(ISD::ROTR, MVT::i8, Expand); 104 setOperationAction(ISD::ROTR, MVT::i16, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
H A D | AMDILISelLowering.cpp | 142 setOperationAction(ISD::ROTR, VT, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/ |
H A D | MBlazeISelLowering.cpp | 167 setOperationAction(ISD::ROTR, MVT::i32, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 1415 setOperationAction(ISD::ROTR , MVT::i32, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 1327 setOperationAction(ISD::ROTR , MVT::i32, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 113 setOperationAction(ISD::ROTR , MVT::i32, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 314 setOperationAction(ISD::ROTR, MVT::i32, Expand); 317 setOperationAction(ISD::ROTR, MVT::i64, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 129 setOperationAction(ISD::ROTR, VT, Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 207 // PowerPC does not have ROTR 208 setOperationAction(ISD::ROTR, MVT::i32 , Expand); 209 setOperationAction(ISD::ROTR, MVT::i64 , Expand);
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/freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 809 setOperationAction(ISD::ROTR, VT, Expand);
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