Searched refs:ROTR (Results 1 - 25 of 25) sorted by relevance

/freebsd-10.0-release/lib/libmd/
H A Dsha256c.c81 #define ROTR(x, n) ((x >> n) | (x << (32 - n))) macro
82 #define S0(x) (ROTR(x, 2) ^ ROTR(x, 13) ^ ROTR(x, 22))
83 #define S1(x) (ROTR(x, 6) ^ ROTR(x, 11) ^ ROTR(x, 25))
84 #define s0(x) (ROTR(x, 7) ^ ROTR(x, 18) ^ SHR(x, 3))
85 #define s1(x) (ROTR(
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H A Dsha512c.c81 #define ROTR(x, n) ((x >> n) | (x << (64 - n))) macro
82 #define S0(x) (ROTR(x, 28) ^ ROTR(x, 34) ^ ROTR(x, 39))
83 #define S1(x) (ROTR(x, 14) ^ ROTR(x, 18) ^ ROTR(x, 41))
84 #define s0(x) (ROTR(x, 1) ^ ROTR(x, 8) ^ SHR(x, 7))
85 #define s1(x) (ROTR(
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/freebsd-10.0-release/contrib/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h29 case ISD::ROTR: return ARM_AM::ror;
30 //case ISD::ROTL: // Only if imm -> turn into ROTR.
H A DARMISelLowering.cpp9324 return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, N0, N1);
/freebsd-10.0-release/crypto/openssl/crypto/sha/
H A Dsha512.c316 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
346 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
354 # define ROTR(a,n) _rotr64((a),n) macro
389 #ifndef ROTR
390 #define ROTR(x,s) (((x)>>s) | (x)<<(64-s)) macro
393 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
394 #define Sigma1(x) (ROTR((x),14) ^ ROTR((
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/freebsd-10.0-release/crypto/openssl/crypto/sha/asm/
H A Dsha512-ia64.pl220 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
453 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
459 _rotr r8=$t1,$Sigma1[1] } // ROTR(e,18)
463 _rotr r9=$t1,$Sigma1[2] } // ROTR(e,41)
467 _rotr r10=$t0,$Sigma0[0] } // ROTR(a,28)
471 _rotr r11=$t0,$Sigma0[1] } // ROTR(a,34)
475 _rotr r8=$t0,$Sigma0[2] } // ROTR(a,39)
493 _rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1)
497 _rotr r9=X[15-1],$sigma0[1] } // ROTR(s0,8)
502 _rotr r10=X[15-14],$sigma1[0] };;// ROTR(s
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H A Dsha512-armv4.pl75 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
130 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
305 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
322 @ sigma1(x) (ROTR((x),19) ^ ROTR((
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/freebsd-10.0-release/contrib/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h318 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
/freebsd-10.0-release/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp117 setOperationAction(ISD::ROTR, MVT::i64, Legal);
120 setOperationAction(ISD::ROTR, MVT::i64, Expand);
124 setOperationAction(ISD::ROTR, MVT::i32, Legal);
127 setOperationAction(ISD::ROTR, MVT::i32, Expand);
131 setOperationAction(ISD::ROTR, MVT::i16, Expand);
133 setOperationAction(ISD::ROTR, MVT::i8, Expand);
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp175 case ISD::ROTR: return "rotr";
H A DLegalizeVectorOps.cpp212 case ISD::ROTR:
H A DSelectionDAG.cpp2217 case ISD::ROTR:
2222 if (Op.getOpcode() == ISD::ROTR)
2779 case ISD::ROTR:
2914 case ISD::ROTR:
6148 case ISD::ROTR:
H A DDAGCombiner.cpp3035 if (TLI.isOperationLegalOrCustom(ISD::ROTR, VT))
3036 return DAG.getNode(ISD::ROTR, N->getDebugLoc(), VT, BSwap, ShAmt);
3227 bool HasROTR = TLI.isOperationLegalOrCustom(ISD::ROTR, VT);
3268 SDValue Rot = DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT,
3302 return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT, LHSShiftArg,
3315 return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT, LHSShiftArg,
3341 return DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT,
3355 return DAG.getNode(HasROTR ? ISD::ROTR : ISD::ROTL, DL, VT,
H A DLegalizeIntegerTypes.cpp799 case ISD::ROTR: Res = PromoteIntOp_Shift(N); break;
2474 case ISD::ROTR: Res = ExpandIntOp_Shift(N); break;
H A DLegalizeDAG.cpp1277 case ISD::ROTR:
/freebsd-10.0-release/contrib/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp102 setOperationAction(ISD::ROTR, MVT::i8, Expand);
104 setOperationAction(ISD::ROTR, MVT::i16, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/R600/
H A DAMDILISelLowering.cpp142 setOperationAction(ISD::ROTR, VT, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/MBlaze/
H A DMBlazeISelLowering.cpp167 setOperationAction(ISD::ROTR, MVT::i32, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1415 setOperationAction(ISD::ROTR , MVT::i32, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/Sparc/
H A DSparcISelLowering.cpp1327 setOperationAction(ISD::ROTR , MVT::i32, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/
H A DXCoreISelLowering.cpp113 setOperationAction(ISD::ROTR , MVT::i32, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp314 setOperationAction(ISD::ROTR, MVT::i32, Expand);
317 setOperationAction(ISD::ROTR, MVT::i64, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/
H A DSystemZISelLowering.cpp129 setOperationAction(ISD::ROTR, VT, Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/
H A DPPCISelLowering.cpp207 // PowerPC does not have ROTR
208 setOperationAction(ISD::ROTR, MVT::i32 , Expand);
209 setOperationAction(ISD::ROTR, MVT::i64 , Expand);
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp809 setOperationAction(ISD::ROTR, VT, Expand);

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