Searched refs:NewOpcode (Results 1 - 10 of 10) sorted by relevance
/freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
H A D | HexagonCFGOptimizer.cpp | 75 int NewOpcode = 0; local 78 NewOpcode = Hexagon::JMP_f; 82 NewOpcode = Hexagon::JMP_t; 86 NewOpcode = Hexagon::JMP_fnew_t; 90 NewOpcode = Hexagon::JMP_tnew_t; 97 MI->setDesc(QII->get(NewOpcode));
|
H A D | HexagonVLIWPacketizer.cpp | 1295 int NewOpcode; local 1297 NewOpcode = GetDotNewPredOp(MI, MBPI, QII); 1299 NewOpcode = GetDotNewOp(MI->getOpcode()); 1300 MI->setDesc(QII->get(NewOpcode)); 1893 int NewOpcode = GetDotOldOp(MI->getOpcode()); local 1894 MI->setDesc(QII->get(NewOpcode)); 2486 int NewOpcode = GetDotNewOp(MI->getOpcode()); local 2487 const MCInstrDesc &desc = QII->get(NewOpcode);
|
/freebsd-10.0-release/contrib/llvm/lib/Target/XCore/ |
H A D | XCoreRegisterInfo.cpp | 218 int NewOpcode; local 220 NewOpcode = (isU6) ? XCore::LDWSP_ru6 : XCore::LDWSP_lru6; 221 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg) 225 NewOpcode = (isU6) ? XCore::STWSP_ru6 : XCore::STWSP_lru6; 226 BuildMI(MBB, II, dl, TII.get(NewOpcode)) 231 NewOpcode = (isU6) ? XCore::LDAWSP_ru6 : XCore::LDAWSP_lru6; 232 BuildMI(MBB, II, dl, TII.get(NewOpcode), Reg)
|
/freebsd-10.0-release/contrib/llvm/lib/Target/SystemZ/ |
H A D | SystemZInstrInfo.cpp | 29 // each having the opcode given by NewOpcode. 31 unsigned NewOpcode) const { 53 unsigned HighOpcode = getOpcodeForOffset(NewOpcode, HighOffsetOp.getImm()); 54 unsigned LowOpcode = getOpcodeForOffset(NewOpcode, LowOffsetOp.getImm()); 71 unsigned NewOpcode = getOpcodeForOffset(SystemZ::LA, Offset); local 72 assert(NewOpcode && "No support for huge argument lists yet"); 73 MI->setDesc(get(NewOpcode));
|
H A D | SystemZInstrInfo.h | 50 void splitMove(MachineBasicBlock::iterator MI, unsigned NewOpcode) const;
|
H A D | SystemZFrameLowering.cpp | 420 unsigned NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset); local 424 if (!NewOpcode) { 429 NewOpcode = ZII->getOpcodeForOffset(Opcode, Offset); 430 assert(NewOpcode && "No restore instruction available"); 433 MBBI->setDesc(ZII->get(NewOpcode));
|
/freebsd-10.0-release/contrib/llvm/lib/Target/Mips/MCTargetDesc/ |
H A D | MipsMCCodeEmitter.cpp | 152 int NewOpcode = Mips::Std2MicroMips (Opcode, Mips::Arch_micromips); local 153 if (NewOpcode != -1) { 154 Opcode = NewOpcode; 155 TmpInst.setOpcode (NewOpcode);
|
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/ |
H A D | X86InstrInfo.cpp | 3217 unsigned NewOpcode = 0; local 3240 case X86::SUB64rm: NewOpcode = X86::CMP64rm; break; 3241 case X86::SUB32rm: NewOpcode = X86::CMP32rm; break; 3242 case X86::SUB16rm: NewOpcode = X86::CMP16rm; break; 3243 case X86::SUB8rm: NewOpcode = X86::CMP8rm; break; 3244 case X86::SUB64rr: NewOpcode = X86::CMP64rr; break; 3245 case X86::SUB32rr: NewOpcode = X86::CMP32rr; break; 3246 case X86::SUB16rr: NewOpcode = X86::CMP16rr; break; 3247 case X86::SUB8rr: NewOpcode = X86::CMP8rr; break; 3248 case X86::SUB64ri32: NewOpcode [all...] |
/freebsd-10.0-release/contrib/llvm/lib/Target/PowerPC/ |
H A D | PPCRegisterInfo.cpp | 608 unsigned NewOpcode = ImmToIdxMap.find(OpC)->second; local 609 MI.setDesc(TII.get(NewOpcode));
|
/freebsd-10.0-release/contrib/llvm/lib/CodeGen/SelectionDAG/ |
H A D | DAGCombiner.cpp | 3444 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; local 3448 return DAG.getNode(NewOpcode, N->getDebugLoc(), VT, LHS, RHS); 3456 unsigned NewOpcode = N0.getOpcode() == ISD::AND ? ISD::OR : ISD::AND; local 3460 return DAG.getNode(NewOpcode, N->getDebugLoc(), VT, LHS, RHS);
|
Completed in 287 milliseconds