Searched refs:I64 (Results 1 - 5 of 5) sorted by relevance

/freebsd-10.0-release/contrib/binutils/opcodes/
H A Dmips16-opc.c64 #define I64 INSN_ISA64 macro
237 {"sew", "x", 0xe8d1, 0xf8ff, WR_x|RD_x, 0, I64 },
240 {"zew", "x", 0xe851, 0xf8ff, WR_x|RD_x, 0, I64 },
H A Dmips-opc.c88 #define I64 INSN_ISA64 macro
529 {"dclo", "U,s", 0x70000025, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 },
530 {"dclz", "U,s", 0x70000024, 0xfc0007ff, RD_s|WR_d|WR_t, 0, I64|N55 },
584 {"dmfc0", "t,+D", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 },
585 {"dmfc0", "t,G,H", 0x40200000, 0xffe007f8, LCD|WR_t|RD_C0, 0, I64 },
589 {"dmtc0", "t,+D", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 },
590 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, COD|RD_t|WR_C0|WR_CC, 0, I64 },
1409 {"dmfc2", "t,G,H", 0x48200000, 0xffe007f8, LCD|WR_t|RD_C2, 0, I64 },
1412 {"dmtc2", "t,G,H", 0x48a00000, 0xffe007f8, COD|RD_t|WR_C2|WR_CC, 0, I64 },
/freebsd-10.0-release/contrib/llvm/lib/Target/X86/
H A DX86ISelDAGToDAG.cpp1535 I64, enumerator in enum:AtomicSz
1755 Opc = AtomicOpcTbl[Op][I64];
/freebsd-10.0-release/contrib/llvm/tools/clang/lib/CodeGen/
H A DTargetInfo.cpp4657 llvm::IntegerType *I64 = llvm::IntegerType::get(getVMContext(), 64);
4675 ArgList.push_back(I64);
/freebsd-10.0-release/contrib/binutils/gas/config/
H A Dtc-arm.c11786 "MOV I64, 0bAAAAAAAABBBB..." which uses OP = 1 despite being MOV not
15973 shl_imm should accept I8 I16 I32 I64,
16024 /* Add/sub take types I8 I16 I32 I64 F32. */
16061 NUF(vsra, 0800110, 3, (RNDQ, oRNDQ, I64), neon_rshift_round_imm),
16062 NUF(vsraq, 0800110, 3, (RNQ, oRNQ, I64), neon_rshift_round_imm),
16063 NUF(vrsra, 0800310, 3, (RNDQ, oRNDQ, I64), neon_rshift_round_imm),
16064 NUF(vrsraq, 0800310, 3, (RNQ, oRNQ, I64), neon_rshift_round_imm),
16068 NUF(vsri, 1800410, 3, (RNDQ, oRNDQ, I64), neon_sri),
16069 NUF(vsriq, 1800410, 3, (RNQ, oRNQ, I64), neon_sri),
16080 /* Right shift narrowing. Types accepted I16 I32 I64
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