Searched refs:CS1 (Results 1 - 7 of 7) sorted by relevance

/freebsd-11-stable/sys/dev/cx/
H A Dcsigma.c288 ! cx_probe_chip (CS1(port)))
292 else if (c3 && ! cx_probe_chip (CS1(port + 0x10)))
350 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(b->port) : CS1(b->port);
383 port = ((rev & BSR_VAR_MASK) != CRONYX_400) ? CS0(port) : CS1(port);
553 CS1A(port) : CS1(port);
555 b->chan[i+12].port = CS1(port+0x10);
780 CS1A(port) : CS1(port);
782 b->chan[i+12].port = CS1(port+0x10);
836 b->chan[i+4].port = CS1(port);
838 b->chan[i+12].port = CS1(por
[all...]
H A Dcxreg.h26 #define CS1(p) ((p) | 0xc000) /* chip select 1 */ macro
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.cpp160 Reserved.set(Hexagon::CS1); // C13
H A DHexagonInstrInfo.cpp993 unsigned CSx = (Mx == Hexagon::M0 ? Hexagon::CS0 : Hexagon::CS1);
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/Hexagon/Disassembler/
H A DHexagonDisassembler.cpp653 /* 12 */ CS0, CS1, UPCYCLELO, UPCYCLEHI,
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Target/AArch64/
H A DAArch64ISelLowering.cpp5292 SDValue CS1 = local
5296 Res = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp);
5476 SDValue CS1 = DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, FVal, CC1Val, Cmp); local
5482 return DAG.getNode(AArch64ISD::CSEL, dl, VT, TVal, CS1, CC2Val, Cmp);
5486 return CS1;
/freebsd-11-stable/contrib/llvm-project/llvm/lib/Transforms/IPO/
H A DAttributor.cpp3159 ChangeStatus CS1 = clampStateAndIndicateChange(S.GlobalState, R.GlobalState); local
3160 return CS0 | CS1;

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