Searched refs:BIT_30 (Results 1 - 6 of 6) sorted by relevance

/freebsd-10.0-release/sys/dev/qlxgb/
H A Dqla_def.h68 #define BIT_30 (0x1 << 30) macro
/freebsd-10.0-release/sys/dev/qlxgbe/
H A Dql_def.h68 #define BIT_30 (0x1 << 30) macro
H A Dql_hw.h442 #define Q8_MBX_RSS_MULTI_RSS_ENGINE_ASSIGN BIT_30
/freebsd-10.0-release/sys/dev/qlxge/
H A Dqls_hw.h84 #define BIT_30 (0x1 << 30) macro
175 #define Q81_CTL_PROC_ADDR_READ BIT_30
369 #define Q81_CTL_FLASH_ADDR_R BIT_30
387 #define Q81_CTL_MAC_PROTO_AI_MR BIT_30
445 #define Q81_CTL_RI_MR BIT_30
503 #define Q81_CTL_RD_RSS_IPV4 BIT_30
H A Dqls_dump.c544 #define Q81_XG_SERDES_ADDR_READ BIT_30
575 #define Q81_XGMAC_ADDR_R BIT_30
/freebsd-10.0-release/sys/dev/msk/
H A Dif_mskreg.h160 #define BIT_30 (1 << 30) macro
262 #define PCI_Y2_DLL_DIS BIT_30 /* Disable PCI DLL (YUKON-2) */
311 #define PCI_OS_PCIX BIT_30 /* PCI-X Bus */
344 #define PCI_CTL_SRESET_VMAIN_AV BIT_30 /* Soft Reset for Vmain_av De-Glitch */
827 #define Y2_IS_STAT_BMU BIT_30 /* Status BMU Interrupt */
1049 #define PEX_DB_ACCESS BIT_30 /* Access to debug register */
1096 #define BMU_RX_TCP_PKT BIT_30 /* Rx TCP Packet (when RSS Hash enabled) */
1129 #define F_TX_CHK_AUTO_ON BIT_30 /* Tx checksum auto-calc On(Yukon EX)*/
1983 #define TX_STFW_ENA BIT_30 /* Enable Store & Forward (Yukon-EC Ultra) */
2300 #define BMU_STF BIT_30 /* Star
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