Searched refs:Available (Results 1 - 6 of 6) sorted by relevance
| /freebsd-10.0-release/contrib/llvm/lib/Target/R600/ |
| H A D | R600MachineScheduler.h | 65 ReadyQueue *Available[IDLast], *Pending[IDLast]; member in class:llvm::R600SchedStrategy
79 Available[IDAlu] = new ReadyQueue(QAlu, "AAlu");
80 Available[IDFetch] = new ReadyQueue(QFetch, "AFetch");
81 Available[IDOther] = new ReadyQueue(QOther, "AOther");
89 delete Available[I];
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| H A D | R600MachineScheduler.cpp | 34 Available[IDAlu]->clear();
35 Available[IDFetch]->clear();
36 Available[IDOther]->clear();
71 (Available[CurInstKind]->empty());
73 (!Available[IDFetch]->empty() || !Available[IDOther]->empty());
107 Available[i]->dump();
159 MoveUnits(Pending[IDFetch], Available[IDFetch]);
161 MoveUnits(Pending[IDOther], Available[IDOther]);
416 ReadyQueue *AQ = Available[QI
[all...] |
| /freebsd-10.0-release/contrib/llvm/lib/Target/Hexagon/ |
| H A D | HexagonMachineScheduler.cpp | 290 Available.push(SU);
315 DEBUG(dbgs() << "*** " << Available.getName() << " cycle "
352 if (Available.empty())
370 Available.push(SU);
379 if (Available.isInQueue(SU))
380 Available.remove(Available.find(SU));
394 for (unsigned i = 0; Available.empty(); ++i) {
401 if (Available.size() == 1)
402 return *Available
[all...] |
| H A D | HexagonMachineScheduler.h | 137 ReadyQueue Available; member in struct:llvm::ConvergingVLIWScheduler::SchedBoundary
156 DAG(0), SchedModel(0), Available(ID, Name+".A"),
173 return Available.getID() == ConvergingVLIWScheduler::TopQID;
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| /freebsd-10.0-release/contrib/llvm/lib/CodeGen/ |
| H A D | MachineScheduler.cpp | 1228 ReadyQueue Available; member in struct:__anon2180::ConvergingScheduler::SchedBoundary
1267 Available.clear();
1291 DAG(0), SchedModel(0), Rem(0), Available(ID, Name+".A"),
1303 return Available.getID() == ConvergingScheduler::TopQID;
1499 I = Bot.Available.begin(), E = Bot.Available.end(); I != E; ++I) {
1537 for (ReadyQueue::iterator I = Available.begin(), E = Available.end();
1540 DEBUG(dbgs() << " " << Available.getName()
1552 DEBUG(dbgs() << " " << Available
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| H A D | RegisterScavenging.cpp | 381 BitVector Available = getRegsAvailable(RC); local
382 Available &= Candidates;
383 if (Available.any())
384 Candidates = Available;
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