Searched refs:VT (Results 1 - 25 of 156) sorted by relevance

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/freebsd-10-stable/contrib/llvm/lib/Target/X86/Utils/
H A DX86ShuffleDecode.h38 void DecodePALIGNRMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
40 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
42 void DecodePSHUFHWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
46 /// DecodeSHUFPMask - This decodes the shuffle masks for shufp*. VT indicates
49 void DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask);
52 /// and punpckh*. VT indicates the type of the vector allowing it to handle
54 void DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
57 /// and punpckl*. VT indicates the type of the vector allowing it to handle
59 void DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask);
62 void DecodeVPERM2X128Mask(MVT VT, unsigne
[all...]
H A DX86ShuffleDecode.cpp64 void DecodePALIGNRMask(MVT VT, unsigned Imm, argument
66 unsigned NumElts = VT.getVectorNumElements();
67 unsigned Offset = Imm * (VT.getVectorElementType().getSizeInBits() / 8);
69 unsigned NumLanes = VT.getSizeInBits() / 128;
83 /// VT indicates the type of the vector allowing it to handle different
85 void DecodePSHUFMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) { argument
86 unsigned NumElts = VT.getVectorNumElements();
88 unsigned NumLanes = VT.getSizeInBits() / 128;
101 void DecodePSHUFHWMask(MVT VT, unsigned Imm, argument
103 unsigned NumElts = VT
117 DecodePSHUFLWMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
136 DecodeSHUFPMask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
158 DecodeUNPCKHMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) argument
178 DecodeUNPCKLMask(MVT VT, SmallVectorImpl<int> &ShuffleMask) argument
195 DecodeVPERM2X128Mask(MVT VT, unsigned Imm, SmallVectorImpl<int> &ShuffleMask) argument
[all...]
/freebsd-10-stable/contrib/llvm/include/llvm/Target/
H A DTargetLowering.h179 virtual bool shouldSplitVectorElementType(EVT /*VT*/) const { return false; }
222 virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const;
258 virtual const TargetRegisterClass *getRegClassFor(MVT VT) const {
259 const TargetRegisterClass *RC = RegClassForVT[VT.SimpleTy];
271 virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {
272 const TargetRegisterClass *RC = RepRegClassForVT[VT.SimpleTy];
278 virtual uint8_t getRepRegClassCostFor(MVT VT) const {
279 return RepRegClassCostForVT[VT.SimpleTy];
285 bool isTypeLegal(EVT VT) const {
286 assert(!VT
305 setTypeAction(MVT VT, LegalizeTypeAction Action) argument
952 addRegisterClass(MVT VT, const TargetRegisterClass *RC) argument
980 setOperationAction(unsigned Op, MVT VT, LegalizeAction Action) argument
[all...]
/freebsd-10-stable/contrib/llvm/lib/Target/R600/
H A DAMDGPUISelLowering.cpp157 MVT::SimpleValueType VT = IntTypes[x]; local
159 setOperationAction(ISD::ADD, VT, Expand);
160 setOperationAction(ISD::AND, VT, Expand);
161 setOperationAction(ISD::FP_TO_SINT, VT, Expand);
162 setOperationAction(ISD::FP_TO_UINT, VT, Expand);
163 setOperationAction(ISD::MUL, VT, Expand);
164 setOperationAction(ISD::OR, VT, Expand);
165 setOperationAction(ISD::SHL, VT, Expand);
166 setOperationAction(ISD::SINT_TO_FP, VT, Expand);
167 setOperationAction(ISD::SRL, VT, Expan
183 MVT::SimpleValueType VT = FloatTypes[x]; local
310 EVT VT = Op.getValueType(); local
337 EVT VT = Op.getValueType(); local
366 EVT VT = Op.getValueType(); local
406 EVT VT = Op.getValueType(); local
418 EVT VT = Op.getValueType(); local
433 EVT VT = Op.getValueType(); local
527 EVT VT = Value.getValueType(); local
609 EVT VT = Op.getValueType(); local
747 EVT VT; local
[all...]
H A DSIISelLowering.h24 SDValue LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, SDLoc DL,
52 bool allowsUnalignedMemoryAccesses(EVT VT, bool *IsFast) const;
53 virtual bool shouldSplitVectorElementType(EVT VT) const;
63 virtual EVT getSetCCResultType(LLVMContext &Context, EVT VT) const;
64 virtual MVT getScalarShiftAmountTy(EVT VT) const;
65 virtual bool isFMAFasterThanFMulAndFAdd(EVT VT) const;
74 unsigned Reg, EVT VT) const;
H A DSIISelLowering.cpp153 bool SITargetLowering::allowsUnalignedMemoryAccesses(EVT VT, argument
157 if (!VT.isSimple() || VT == MVT::Other)
159 return VT.bitsGT(MVT::i32);
162 bool SITargetLowering::shouldSplitVectorElementType(EVT VT) const {
163 return VT.bitsLE(MVT::i16);
166 SDValue SITargetLowering::LowerParameter(SelectionDAG &DAG, EVT VT, EVT MemVT, argument
170 PointerType *PtrTy = PointerType::get(VT.getTypeForEVT(*DAG.getContext()),
176 return DAG.getExtLoad(ISD::SEXTLOAD, DL, VT, Chain, Ptr,
221 if (Info->ShaderType != ShaderType::COMPUTE && Arg.VT
276 EVT VT = VA.getLocVT(); local
468 EVT VT = Op.getValueType(); local
562 EVT VT = Op.getOperand(3).getValueType(); local
753 EVT VT = Op.getValueType(); local
768 EVT VT = Op.getValueType(); local
784 EVT VT = Store->getMemoryVT(); local
833 EVT VT = Op.getValueType(); local
852 EVT VT = N->getValueType(0); local
[all...]
H A DAMDILISelLowering.cpp95 MVT::SimpleValueType VT = (MVT::SimpleValueType)types[x]; local
99 setOperationAction(ISD::SIGN_EXTEND_INREG, VT, Custom);
100 setOperationAction(ISD::SUBE, VT, Expand);
101 setOperationAction(ISD::SUBC, VT, Expand);
102 setOperationAction(ISD::ADDE, VT, Expand);
103 setOperationAction(ISD::ADDC, VT, Expand);
104 setOperationAction(ISD::BRCOND, VT, Custom);
105 setOperationAction(ISD::BR_JT, VT, Expand);
106 setOperationAction(ISD::BRIND, VT, Expand);
108 setOperationAction(ISD::SREM, VT, Expan
116 MVT::SimpleValueType VT = (MVT::SimpleValueType)FloatTypes[x]; local
131 MVT::SimpleValueType VT = (MVT::SimpleValueType)IntTypes[x]; local
149 MVT::SimpleValueType VT = (MVT::SimpleValueType)VectorTypes[ii]; local
[all...]
H A DR600RegisterInfo.h46 virtual const TargetRegisterClass * getCFGStructurizerRegClass(MVT VT) const;
/freebsd-10-stable/contrib/llvm/lib/CodeGen/
H A DCallingConvLower.cpp72 MVT ArgVT = Ins[i].VT;
90 MVT VT = Outs[i].VT; local
92 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
104 MVT VT = Outs[i].VT; local
106 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) {
109 << EVT(VT)
158 MVT VT = Ins[i].VT; local
172 AnalyzeCallResult(MVT VT, CCAssignFn Fn) argument
[all...]
/freebsd-10-stable/contrib/byacc/test/btyacc/
H A Dok_syntax1.tab.h18 #define VT 272 macro
/freebsd-10-stable/contrib/byacc/test/yacc/
H A Dok_syntax1.tab.h15 #define VT 272 macro
/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/
H A DHexagonCallingConvLower.cpp81 EVT ArgVT = Ins[i].VT;
117 EVT VT = Outs[i].VT; local
119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){
121 << VT.getEVTString() << "\n";
147 EVT ArgVT = Outs[i].VT;
185 EVT VT = Ins[i].VT; local
187 if (Fn(i, VT, V
197 AnalyzeCallResult(EVT VT, Hexagon_CCAssignFn Fn) argument
[all...]
/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/
H A DSelectionDAG.h53 SDVTListNode(const FoldingSetNodeIDRef ID, const EVT *VT, unsigned int Num) : argument
54 FastID(ID), VTs(VT), NumVTs(Num) {
399 SDVTList getVTList(EVT VT);
408 SDValue getConstant(uint64_t Val, EVT VT, bool isTarget = false);
409 SDValue getConstant(const APInt &Val, EVT VT, bool isTarget = false);
410 SDValue getConstant(const ConstantInt &Val, EVT VT, bool isTarget = false);
412 SDValue getTargetConstant(uint64_t Val, EVT VT) { argument
413 return getConstant(Val, VT, true);
415 SDValue getTargetConstant(const APInt &Val, EVT VT) { argument
416 return getConstant(Val, VT, tru
418 getTargetConstant(const ConstantInt &Val, EVT VT) argument
426 getTargetConstantFP(double Val, EVT VT) argument
429 getTargetConstantFP(const APFloat& Val, EVT VT) argument
432 getTargetConstantFP(const ConstantFP &Val, EVT VT) argument
438 getTargetGlobalAddress(const GlobalValue *GV, SDLoc DL, EVT VT, int64_t offset = 0, unsigned char TargetFlags = 0) argument
444 getTargetFrameIndex(int FI, EVT VT) argument
449 getTargetJumpTable(int JTI, EVT VT, unsigned char TargetFlags = 0) argument
455 getTargetConstantPool(const Constant *C, EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags = 0) argument
463 getTargetConstantPool(MachineConstantPoolValue *C, EVT VT, unsigned Align = 0, int Offset = 0, unsigned char TargetFlags=0) argument
485 getTargetBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset = 0, unsigned char TargetFlags = 0) argument
514 getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT) argument
523 getCopyFromReg(SDValue Chain, SDLoc dl, unsigned Reg, EVT VT, SDValue Glue) argument
589 getUNDEF(EVT VT) argument
595 getGLOBAL_OFFSET_TABLE(EVT VT) argument
657 getSetCC(SDLoc DL, EVT VT, SDValue LHS, SDValue RHS, ISD::CondCode Cond) argument
670 getSelect(SDLoc DL, EVT VT, SDValue Cond, SDValue LHS, SDValue RHS) argument
1017 EVTToAPFloatSemantics(EVT VT) argument
[all...]
H A DValueTypes.h443 /// Return true if this has more bits than VT.
444 bool bitsGT(MVT VT) const {
445 return getSizeInBits() > VT.getSizeInBits();
448 /// Return true if this has no less bits than VT.
449 bool bitsGE(MVT VT) const {
450 return getSizeInBits() >= VT.getSizeInBits();
453 /// Return true if this has less bits than VT.
454 bool bitsLT(MVT VT) const {
455 return getSizeInBits() < VT.getSizeInBits();
458 /// Return true if this has no more bits than VT
500 getVectorVT(MVT VT, unsigned NumElements) argument
616 getVectorVT(LLVMContext &Context, EVT VT, unsigned NumElements) argument
[all...]
H A DFastISel.h182 virtual unsigned FastEmit_(MVT VT,
188 virtual unsigned FastEmit_r(MVT VT,
195 virtual unsigned FastEmit_rr(MVT VT,
204 virtual unsigned FastEmit_ri(MVT VT,
213 virtual unsigned FastEmit_rf(MVT VT,
222 virtual unsigned FastEmit_rri(MVT VT,
234 unsigned FastEmit_ri_(MVT VT,
241 virtual unsigned FastEmit_i(MVT VT,
249 virtual unsigned FastEmit_f(MVT VT,
335 unsigned FastEmitZExtFromI1(MVT VT,
[all...]
/freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DDAGCombiner.cpp272 SDValue SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond,
276 SDValue CombineConsecutiveLoads(SDNode *N, EVT VT);
357 /// legalization or if the specified VT is legal.
358 bool isTypeLegal(const EVT &VT) { argument
360 return TLI.isTypeLegal(VT);
365 EVT getSetCCResultType(EVT VT) const {
366 return TLI.getSetCCResultType(*DAG.getContext(), VT);
608 EVT VT = N0.getValueType(); local
613 DAG.FoldConstantArithmetic(Opc, VT,
616 return DAG.getNode(Opc, DL, VT, N
740 EVT VT = Load->getValueType(0); local
1382 EVT VT = N0.getValueType(); local
1406 EVT VT = N0.getValueType(); local
1576 EVT VT = N0.getValueType(); local
1633 tryFoldToZero(SDLoc DL, const TargetLowering &TLI, EVT VT, SelectionDAG &DAG, bool LegalOperations, bool LegalTypes) argument
1650 EVT VT = N0.getValueType(); local
1741 EVT VT = N0.getValueType(); local
1800 EVT VT = N0.getValueType(); local
1922 EVT VT = N->getValueType(0); local
2006 EVT VT = N->getValueType(0); local
2058 EVT VT = N->getValueType(0); local
2100 EVT VT = N->getValueType(0); local
2152 EVT VT = N->getValueType(0); local
2190 EVT VT = N->getValueType(0); local
2376 EVT VT = N0.getValueType(); local
2498 EVT VT = N1.getValueType(); local
2596 EVT VT = Vector->getValueType(0); local
3136 EVT VT = N1.getValueType(); local
3310 EVT VT = LHS.getValueType(); local
3430 EVT VT = N0.getValueType(); local
3635 EVT VT = N0.getValueType(); local
3792 EVT VT = N0.getValueType(); local
3943 EVT VT = N0.getValueType(); local
4141 EVT VT = N->getValueType(0); local
4151 EVT VT = N->getValueType(0); local
4161 EVT VT = N->getValueType(0); local
4171 EVT VT = N->getValueType(0); local
4181 EVT VT = N->getValueType(0); local
4196 EVT VT = N->getValueType(0); local
4317 EVT VT = LHS.getValueType(); local
4333 EVT VT = N->getValueType(0); local
4493 EVT VT = N->getValueType(0); local
4743 EVT VT = N->getValueType(0); local
5008 EVT VT = N->getValueType(0); local
5208 EVT VT = N->getValueType(0); local
5369 EVT VT = N->getValueType(0); local
5474 EVT VT = N->getValueType(0); local
5651 CombineConsecutiveLoads(SDNode *N, EVT VT) argument
5685 EVT VT = N->getValueType(0); local
5835 EVT VT = N->getValueType(0); local
5855 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, local
5932 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, Ops.size()); local
5941 EVT VT = EVT::getVectorVT(*DAG.getContext(), DstEltVT, local
5979 EVT VT = N->getValueType(0); local
6189 EVT VT = N->getValueType(0); local
6280 EVT VT = N->getValueType(0); local
6345 EVT VT = N->getValueType(0); local
6419 EVT VT = N->getValueType(0); local
6473 EVT VT = N->getValueType(0); local
6487 EVT VT = N->getValueType(0); local
6535 EVT VT = N->getValueType(0); local
6592 EVT VT = N->getValueType(0); local
6636 EVT VT = N->getValueType(0); local
6648 EVT VT = N->getValueType(0); local
6661 EVT VT = N->getValueType(0); local
6694 EVT VT = N->getValueType(0); local
6710 EVT VT = N->getValueType(0); local
6755 EVT VT = N->getValueType(0); local
6799 EVT VT = N->getValueType(0); local
6811 EVT VT = N->getValueType(0); local
6823 EVT VT = N->getValueType(0); local
6835 EVT VT = N->getValueType(0); local
7058 EVT VT; local
7105 EVT VT; local
7336 EVT VT; local
8276 EVT VT = Value.getValueType(); local
8400 EVT VT = LD->getMemoryVT(); local
9290 EVT VT = InVec.getValueType(); local
9510 EVT VT = N->getValueType(0); local
9677 EVT VT = N->getValueType(0); local
9950 EVT VT = N->getValueType(0); local
10001 EVT VT = N->getValueType(0); local
10153 EVT VT = N->getValueType(0); local
10233 EVT VT = LHSOp.getValueType(); local
10732 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, SDLoc DL, bool foldBooleans) argument
[all...]
H A DSelectionDAG.cpp78 bool ConstantFPSDNode::isValueValidForType(EVT VT, argument
80 assert(VT.isFloatingPoint() && "Can only convert between FP types");
85 (void) Val2.convert(SelectionDAG::EVTToAPFloatSemantics(VT),
677 EVT VT = cast<VTSDNode>(N)->getVT(); local
678 if (VT.isExtended()) {
679 Erased = ExtendedValueTypeNodes.erase(VT);
681 Erased = ValueTypeNodes[VT.getSimpleVT().SimpleTy] != 0;
682 ValueTypeNodes[VT.getSimpleVT().SimpleTy] = 0;
797 EVT VT = N->getValueType(0); local
799 assert(!VT
928 getAnyExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) argument
934 getSExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) argument
940 getZExtOrTrunc(SDValue Op, SDLoc DL, EVT VT) argument
946 getZeroExtendInReg(SDValue Op, SDLoc DL, EVT VT) argument
960 getNOT(SDLoc DL, SDValue Val, EVT VT) argument
967 getConstant(uint64_t Val, EVT VT, bool isT) argument
975 getConstant(const APInt &Val, EVT VT, bool isT) argument
979 getConstant(const ConstantInt &Val, EVT VT, bool isT) argument
1078 getConstantFP(const APFloat& V, EVT VT, bool isTarget) argument
1082 getConstantFP(const ConstantFP& V, EVT VT, bool isTarget) argument
1116 getConstantFP(double Val, EVT VT, bool isTarget) argument
1133 getGlobalAddress(const GlobalValue *GV, SDLoc DL, EVT VT, int64_t Offset, bool isTargetGA, unsigned char TargetFlags) argument
1177 getFrameIndex(int FI, EVT VT, bool isTarget) argument
1192 getJumpTable(int JTI, EVT VT, bool isTarget, unsigned char TargetFlags) argument
1212 getConstantPool(const Constant *C, EVT VT, unsigned Alignment, int Offset, bool isTarget, unsigned char TargetFlags) argument
1240 getConstantPool(MachineConstantPoolValue *C, EVT VT, unsigned Alignment, int Offset, bool isTarget, unsigned char TargetFlags) argument
1267 getTargetIndex(int Index, EVT VT, int64_t Offset, unsigned char TargetFlags) argument
1299 getValueType(EVT VT) argument
1313 getExternalSymbol(const char *Sym, EVT VT) argument
1321 getTargetExternalSymbol(const char *Sym, EVT VT, unsigned char TargetFlags) argument
1359 getVectorShuffle(EVT VT, SDLoc dl, SDValue N1, SDValue N2, const int *Mask) argument
1444 getConvertRndSat(EVT VT, SDLoc dl, SDValue Val, SDValue DTy, SDValue STy, SDValue Rnd, SDValue Sat, ISD::CvtCode Code) argument
1469 getRegister(unsigned RegNo, EVT VT) argument
1514 getBlockAddress(const BlockAddress *BA, EVT VT, int64_t Offset, bool isTarget, unsigned char TargetFlags) argument
1571 getAddrSpaceCast(SDLoc dl, EVT VT, SDValue Ptr, unsigned SrcAS, unsigned DestAS) argument
1604 CreateStackTemporary(EVT VT, unsigned minAlign) argument
1633 FoldSetCC(EVT VT, SDValue N1, SDValue N2, ISD::CondCode Cond, SDLoc dl) argument
2009 EVT VT = LD->getMemoryVT(); local
2076 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); local
2214 EVT VT = Op.getValueType(); local
2493 getNode(unsigned Opcode, SDLoc DL, EVT VT) argument
2511 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue Operand) argument
2777 FoldConstantArithmetic(unsigned Opcode, EVT VT, SDNode *Cst1, SDNode *Cst2) argument
2886 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2) argument
3352 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3) argument
3459 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4) argument
3466 getNode(unsigned Opcode, SDLoc DL, EVT VT, SDValue N1, SDValue N2, SDValue N3, SDValue N4, SDValue N5) argument
3498 getMemsetValue(SDValue Value, EVT VT, SelectionDAG &DAG, SDLoc dl) argument
3525 getMemsetStringVal(EVT VT, SDLoc dl, SelectionDAG &DAG, const TargetLowering &TLI, StringRef Str) argument
3569 EVT VT = Base.getValueType(); local
3615 EVT VT = TLI.getOptimalMemOpType(Size, DstAlign, SrcAlign, local
3762 EVT VT = MemOps[i]; local
3866 EVT VT = MemOps[i]; local
3882 EVT VT = MemOps[i]; local
3966 EVT VT = MemOps[i]; local
4260 EVT VT = Cmp.getValueType(); local
4318 EVT VT = Val.getValueType(); local
4326 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, const Value* PtrVal, unsigned Alignment, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
4357 getAtomic(unsigned Opcode, SDLoc dl, EVT MemVT, EVT VT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument
4492 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument
4525 getLoad(ISD::MemIndexedMode AM, ISD::LoadExtType ExtType, EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue Offset, EVT MemVT, MachineMemOperand *MMO) argument
4573 getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, bool isVolatile, bool isNonTemporal, bool isInvariant, unsigned Alignment, const MDNode *TBAAInfo, const MDNode *Ranges) argument
4586 getLoad(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO) argument
4594 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, MachinePointerInfo PtrInfo, EVT MemVT, bool isVolatile, bool isNonTemporal, unsigned Alignment, const MDNode *TBAAInfo) argument
4606 getExtLoad(ISD::LoadExtType ExtType, SDLoc dl, EVT VT, SDValue Chain, SDValue Ptr, EVT MemVT, MachineMemOperand *MMO) argument
4657 EVT VT = Val.getValueType(); local
4710 EVT VT = Val.getValueType(); local
4776 getVAArg(EVT VT, SDLoc dl, SDValue Chain, SDValue Ptr, SDValue SV, unsigned Align) argument
4784 getNode(unsigned Opcode, SDLoc DL, EVT VT, const SDUse *Ops, unsigned NumOps) argument
4800 getNode(unsigned Opcode, SDLoc DL, EVT VT, const SDValue *Ops, unsigned NumOps) argument
4985 getVTList(EVT VT) argument
5197 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT) argument
5203 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1) argument
5210 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2) argument
5218 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument
5226 SelectNodeTo(SDNode *N, unsigned MachineOpc, EVT VT, const SDValue *Ops, unsigned NumOps) argument
5419 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT) argument
5425 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1) argument
5432 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2) argument
5440 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, SDValue Op1, SDValue Op2, SDValue Op3) argument
5448 getMachineNode(unsigned Opcode, SDLoc dl, EVT VT, ArrayRef<SDValue> Ops) argument
5581 getTargetExtractSubreg(int SRIdx, SDLoc DL, EVT VT, SDValue Operand) argument
5592 getTargetInsertSubreg(int SRIdx, SDLoc DL, EVT VT, SDValue Operand, SDValue Subreg) argument
6054 GlobalAddressSDNode(unsigned Opc, unsigned Order, DebugLoc DL, const GlobalValue *GA, EVT VT, int64_t o, unsigned char TF) argument
6061 AddrSpaceCastSDNode(unsigned Order, DebugLoc dl, EVT VT, SDValue X, unsigned SrcAS, unsigned DestAS) argument
6113 getValueTypeList(EVT VT) argument
6265 EVT VT = N->getValueType(0); local
6469 EVT VT = getValueType(0); local
6529 isSplatMask(const int *Mask, EVT VT) argument
[all...]
H A DLegalizeVectorOps.cpp322 MVT VT = Op.getSimpleValueType(); local
325 MVT NVT = TLI.getTypeToPromoteTo(Op.getOpcode(), VT);
338 return DAG.getNode(ISD::BITCAST, dl, VT, Op);
344 EVT VT = Op.getOperand(0).getValueType(); local
355 unsigned NumElts = VT.getVectorNumElements();
356 EVT EltVT = VT.getVectorElementType();
582 EVT VT = Op.getValueType(); local
589 assert(VT.isVector() && !Mask.getValueType().isVector()
592 unsigned NumElem = VT.getVectorNumElements();
599 if (TLI.getOperationAction(ISD::AND, VT)
636 EVT VT = Op.getValueType(); local
664 EVT VT = Mask.getValueType(); local
703 EVT VT = Op.getOperand(0).getValueType(); local
752 EVT VT = Op.getValueType(); local
[all...]
H A DTargetLowering.cpp116 void TargetLowering::softenSetCCOperands(SelectionDAG &DAG, EVT VT, argument
120 assert((VT == MVT::f32 || VT == MVT::f64 || VT == MVT::f128)
128 LC1 = (VT == MVT::f32) ? RTLIB::OEQ_F32 :
129 (VT == MVT::f64) ? RTLIB::OEQ_F64 : RTLIB::OEQ_F128;
133 LC1 = (VT == MVT::f32) ? RTLIB::UNE_F32 :
134 (VT == MVT::f64) ? RTLIB::UNE_F64 : RTLIB::UNE_F128;
138 LC1 = (VT == MVT::f32) ? RTLIB::OGE_F32 :
139 (VT
300 EVT VT = Op.getValueType(); local
531 EVT VT = Op.getValueType(); local
546 EVT VT = Op.getValueType(); local
622 EVT VT = Op.getValueType(); local
669 EVT VT = Op.getValueType(); local
686 EVT VT = Op.getValueType(); local
739 EVT VT = Op.getValueType(); local
985 EVT VT = cast<VTSDNode>(Op.getOperand(1))->getVT(); local
1121 SimplifySetCC(EVT VT, SDValue N0, SDValue N1, ISD::CondCode Cond, bool foldBooleans, DAGCombinerInfo &DCI, SDLoc dl) const argument
2543 EVT VT = N->getValueType(0); local
2603 EVT VT = N->getValueType(0); local
[all...]
H A DFastISel.cpp148 MVT VT = RealVT.getSimpleVT();
149 if (!TLI.isTypeLegal(VT)) {
151 if (VT == MVT::i1 || VT == MVT::i8 || VT == MVT::i16)
152 VT = TLI.getTypeToTransformTo(V->getContext(), VT).getSimpleVT();
173 Reg = materializeRegForValue(V, VT);
183 unsigned FastISel::materializeRegForValue(const Value *V, MVT VT) { argument
188 Reg = FastEmit_i(VT, V
358 EVT VT = EVT::getEVT(I->getType(), /*HandleUnknown=*/true); local
479 MVT VT = TLI.getPointerTy(); local
899 EVT VT = TLI.getValueType(I->getType()); local
1165 FastEmit_ri_(MVT VT, unsigned Opcode, unsigned Op0, bool Op0IsKill, uint64_t Imm, MVT ImmType) argument
1442 FastEmitZExtFromI1(MVT VT, unsigned Op0, bool Op0IsKill) argument
1486 EVT VT = TLI.getValueType(PN->getType(), /*AllowUnknown=*/true); local
[all...]
H A DLegalizeDAG.cpp61 EVT getSetCCResultType(EVT VT) const {
62 return TLI.getSetCCResultType(*DAG.getContext(), VT);
94 SDValue ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl,
98 bool LegalizeSetCCCondCode(EVT VT, SDValue &LHS, SDValue &RHS, SDValue &CC,
188 SelectionDAGLegalize::ShuffleWithNarrowerEltType(EVT NVT, EVT VT, SDLoc dl, argument
191 unsigned NumMaskElts = VT.getVectorNumElements();
262 EVT VT = CFP->getValueType(0); local
265 assert((VT == MVT::f64 || VT == MVT::f32) && "Invalid type expansion");
267 (VT
312 EVT VT = Val.getValueType(); local
437 EVT VT = LD->getValueType(0); local
594 EVT VT = Tmp1.getValueType(); local
729 MVT VT = Value.getSimpleValueType(); local
[all...]
/freebsd-10-stable/contrib/ntp/include/
H A Dascii.h52 #define VT 11 macro
/freebsd-10-stable/contrib/llvm/lib/Target/X86/
H A DX86ISelLowering.cpp59 static SDValue getMOVL(SelectionDAG &DAG, SDLoc dl, EVT VT, SDValue V1,
67 EVT VT = Vec.getValueType(); local
68 EVT ElVT = VT.getVectorElementType();
69 unsigned Factor = VT.getSizeInBits()/vectorWidth;
71 VT.getVectorNumElements()/Factor);
125 EVT VT = Vec.getValueType();
126 EVT ElVT = VT.getVectorElementType();
165 static SDValue Concat128BitVectors(SDValue V1, SDValue V2, EVT VT, argument
168 SDValue V = Insert128BitVector(DAG.getUNDEF(VT), V1, 0, DAG, dl);
172 static SDValue Concat256BitVectors(SDValue V1, SDValue V2, EVT VT, argument
420 MVT VT = IntVTs[i]; local
573 MVT VT = IntVTs[i]; local
799 MVT VT = (MVT::SimpleValueType)i; local
972 MVT VT = (MVT::SimpleValueType)i; local
998 MVT VT = (MVT::SimpleValueType)i; local
1262 MVT VT = (MVT::SimpleValueType)i; local
1284 MVT VT = (MVT::SimpleValueType)i; local
1412 MVT VT = (MVT::SimpleValueType)i; local
1438 MVT VT = (MVT::SimpleValueType)i; local
1470 MVT VT = IntVTs[i]; local
1664 allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const argument
1950 getTypeForExtArgOrReturn(MVT VT, ISD::NodeType ExtendKind) const argument
2467 EVT VT = getPointerTy(); local
3289 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, SelectionDAG &DAG) argument
3300 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, unsigned TargetMask, SelectionDAG &DAG) argument
3314 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, SDValue V2, unsigned TargetMask, SelectionDAG &DAG) argument
3327 getTargetShuffleNode(unsigned Opc, SDLoc dl, EVT VT, SDValue V1, SDValue V2, SelectionDAG &DAG) argument
3562 isPSHUFDMask(ArrayRef<int> Mask, MVT VT) argument
3572 isPSHUFHWMask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
3601 isPSHUFLWMask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
3630 isPALIGNRMask(ArrayRef<int> Mask, MVT VT, const X86Subtarget *Subtarget) argument
3720 isSHUFPMask(ArrayRef<int> Mask, MVT VT, bool Commuted = false) argument
3779 isMOVHLPSMask(ArrayRef<int> Mask, MVT VT) argument
3798 isMOVHLPS_v_undef_Mask(ArrayRef<int> Mask, MVT VT) argument
3815 isMOVLPMask(ArrayRef<int> Mask, MVT VT) argument
3837 isMOVLHPSMask(ArrayRef<int> Mask, MVT VT) argument
3863 MVT VT = SVOp->getSimpleValueType(0); local
3906 isUNPCKLMask(ArrayRef<int> Mask, MVT VT, bool HasInt256, bool V2IsSplat = false) argument
3954 isUNPCKHMask(ArrayRef<int> Mask, MVT VT, bool HasInt256, bool V2IsSplat = false) argument
4002 isUNPCKL_v_undef_Mask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
4045 isUNPCKH_v_undef_Mask(ArrayRef<int> Mask, MVT VT, bool HasInt256) argument
4079 isMOVLMask(ArrayRef<int> Mask, EVT VT) argument
4103 isVPERM2X128Mask(ArrayRef<int> Mask, MVT VT, bool HasFp256) argument
4135 MVT VT = SVOp->getSimpleValueType(0); local
4157 isPermImmMask(ArrayRef<int> Mask, MVT VT, unsigned& Imm8) argument
4201 isVPERMILPMask(ArrayRef<int> Mask, MVT VT) argument
4233 isCommutedMOVLMask(ArrayRef<int> Mask, MVT VT, bool V2IsSplat = false, bool V2IsUndef = false) argument
4257 isMOVSHDUPMask(ArrayRef<int> Mask, MVT VT, const X86Subtarget *Subtarget) argument
4281 isMOVSLDUPMask(ArrayRef<int> Mask, MVT VT, const X86Subtarget *Subtarget) argument
4305 isMOVDDUPYMask(ArrayRef<int> Mask, MVT VT, bool HasFp256) argument
4325 isMOVDDUPMask(ArrayRef<int> Mask, MVT VT) argument
4351 MVT VT = N->getSimpleValueType(0); local
4369 MVT VT = N->getSimpleValueType(0); local
4396 MVT VT = N->getSimpleValueType(0); local
4426 MVT VT = N->getSimpleValueType(0); local
4450 MVT VT = N->getSimpleValueType(0); local
4474 MVT VT = SVOp->getSimpleValueType(0); local
4568 MVT VT = SVOp->getSimpleValueType(0); local
4590 ShouldXformToMOVHLPS(ArrayRef<int> Mask, MVT VT) argument
4646 ShouldXformToMOVLP(SDNode *V1, SDNode *V2, ArrayRef<int> Mask, MVT VT) argument
4714 getZeroVector(EVT VT, const X86Subtarget *Subtarget, SelectionDAG &DAG, SDLoc dl) argument
4758 getOnesVector(MVT VT, bool HasInt256, SelectionDAG &DAG, SDLoc dl) argument
4793 getMOVL(SelectionDAG &DAG, SDLoc dl, EVT VT, SDValue V1, SDValue V2) argument
4804 getUnpackl(SelectionDAG &DAG, SDLoc dl, MVT VT, SDValue V1, SDValue V2) argument
4816 getUnpackh(SelectionDAG &DAG, SDLoc dl, MVT VT, SDValue V1, SDValue V2) argument
4832 MVT VT = V.getSimpleValueType(); local
4850 MVT VT = V.getSimpleValueType(); local
4921 MVT VT = V2.getSimpleValueType(); local
4935 getTargetShuffleMask(SDNode *N, MVT VT, SmallVectorImpl<int> &Mask, bool &IsUnary) argument
5021 EVT VT = V.getValueType(); local
5301 getVShift(bool isLeft, EVT VT, SDValue SrcOp, unsigned NumBits, SelectionDAG &DAG, const TargetLowering &TLI, SDLoc dl) argument
5315 LowerAsSplatVectorLoad(SDValue SrcOp, MVT VT, SDLoc dl, SelectionDAG &DAG) argument
5397 EltsFromConsecutiveLoads(EVT VT, SmallVectorImpl<SDValue> &Elts, SDLoc &DL, SelectionDAG &DAG, bool isAfterLegalize) argument
5630 MVT VT = Op.getSimpleValueType(); local
5707 MVT VT = Op.getSimpleValueType(); local
5812 MVT VT = Op.getSimpleValueType(); local
6178 MVT VT = SVOp->getSimpleValueType(0); local
6623 MVT VT = SVOp->getSimpleValueType(0); local
6671 MVT VT = SVOp->getSimpleValueType(0); local
6708 getVZextMovL(MVT VT, MVT OpVT, SDValue SrcOp, SelectionDAG &DAG, const X86Subtarget *Subtarget, SDLoc dl) argument
6862 MVT VT = SVOp->getSimpleValueType(0); local
7206 MVT VT = Op.getSimpleValueType(); local
7265 MVT VT = Op.getSimpleValueType(); local
7583 MVT VT = Op.getSimpleValueType(); local
7698 MVT VT = Op.getSimpleValueType(); local
7755 MVT VT = Op.getSimpleValueType(); local
7809 MVT VT = Op.getSimpleValueType(); local
8427 EVT VT = Op.getValueType(); local
8887 MVT VT = Op->getSimpleValueType(0); local
8930 MVT VT = Op->getValueType(0).getSimpleVT(); local
8973 MVT VT = Op.getSimpleValueType(); local
8993 MVT VT = Op.getSimpleValueType(); local
9134 MVT VT = Op.getSimpleValueType(); local
9178 MVT VT = Op.getSimpleValueType(); local
9192 MVT VT = Op.getSimpleValueType(); local
9226 MVT VT = Op.getSimpleValueType(); local
9263 MVT VT = Op.getSimpleValueType(); local
9340 MVT VT = Op.getSimpleValueType(); local
9365 EVT VT = MVT::Other; local
9611 EVT VT = Op.getValueType(); local
9820 MVT VT = Op.getSimpleValueType(); local
9851 MVT VT = Op.getSimpleValueType(); local
9886 MVT VT = Op.getSimpleValueType(); local
10081 MVT VT = Op.getSimpleValueType(); local
10183 EVT VT = Op1.getValueType(); local
10280 MVT VT = Op.getSimpleValueType(); local
10390 MVT VT = Op->getSimpleValueType(0); local
10422 MVT VT = Op->getSimpleValueType(0); local
10778 EVT VT = Op.getNode()->getValueType(0); local
10982 getTargetVShiftByConstNode(unsigned Opc, SDLoc dl, EVT VT, SDValue SrcOp, uint64_t ShiftAmt, SelectionDAG &DAG) argument
11002 getTargetVShiftNode(unsigned Opc, SDLoc dl, EVT VT, SDValue SrcOp, SDValue ShAmt, SelectionDAG &DAG) argument
12035 EVT VT = Op.getValueType(); local
12280 EVT VT = Op.getValueType(); local
12325 EVT VT = Op.getValueType(); local
12359 EVT VT = Op.getValueType(); local
12384 EVT VT = Op.getValueType(); local
12406 EVT VT = Op.getValueType(); local
12449 EVT VT = Op.getValueType(); local
12519 EVT VT = Op.getValueType(); local
12575 EVT VT = Op.getValueType(); local
12747 EVT VT = Op.getValueType(); local
12892 EVT VT = Op.getValueType(); local
13098 EVT VT = Op.getValueType(); local
13297 EVT VT = cast<AtomicSDNode>(Node)->getMemoryVT(); local
13320 EVT VT = Op.getNode()->getValueType(0); local
13488 EVT VT = cast<AtomicSDNode>(Node)->getMemoryVT(); local
13556 EVT VT = N->getValueType(0); local
14146 getCmpXChgOpcode(EVT VT) argument
14159 getLoadOpcode(EVT VT) argument
14252 getPseudoCMOVOpc(EVT VT) argument
14318 MVT::SimpleValueType VT = *RC->vt_begin(); local
16127 EVT VT = SVOp->getValueType(0); local
16143 EVT VT = SVOp->getValueType(0); local
16163 EVT VT = SVOp->getValueType(0); local
16256 EVT VT = N->getValueType(0); local
16527 matchIntegerMINMAX(SDValue Cond, EVT VT, SDValue LHS, SDValue RHS, SelectionDAG &DAG, const X86Subtarget *Subtarget) argument
16610 EVT VT = LHS.getValueType(); local
17435 EVT VT = N0.getValueType(); local
17479 EVT VT = N->getValueType(0); local
17547 EVT VT = CMP00.getValueType(); local
17622 EVT VT = N->getValueType(0); local
17656 EVT VT = N->getValueType(0); local
17734 EVT VT = N->getValueType(0); local
17849 EVT VT = N->getValueType(0); local
18000 EVT VT = N->getValueType(0); local
18037 EVT VT = N->getValueType(0); local
18272 EVT VT = St->getValue().getValueType(); local
18630 EVT VT = N->getValueType(0); local
18645 EVT VT = N->getValueType(0); local
18743 EVT VT = N->getValueType(0), OpVT = Op.getValueType(); local
18754 EVT VT = N->getValueType(0); local
18809 EVT VT = N->getValueType(0); local
18855 EVT VT = N->getValueType(0); local
19000 EVT VT = Ld->getValueType(0); local
19026 EVT VT = N->getValueType(0); local
19082 EVT VT = N->getValueType(0); local
19109 EVT VT = Op0.getValueType(); local
19119 EVT VT = N->getValueType(0); local
19239 EVT VT = Op.getValueType(); local
[all...]
/freebsd-10-stable/contrib/llvm/lib/Target/Mips/
H A DMipsSEISelLowering.h33 virtual bool allowsUnalignedMemoryAccesses(EVT VT, bool *Fast) const;
43 EVT VT) const {
47 virtual const TargetRegisterClass *getRepRegClassFor(MVT VT) const {
48 if (VT == MVT::Untyped)
52 return TargetLowering::getRepRegClassFor(VT);
/freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.h91 bool isTypeSupportedInIntrinsic(MVT VT) const;
106 virtual EVT getSetCCResultType(LLVMContext &, EVT VT) const {
107 if (VT.isVector())
108 return MVT::getVectorVT(MVT::i1, VT.getVectorNumElements());
114 getRegForInlineAsmConstraint(const std::string &Constraint, MVT VT) const;
144 virtual bool shouldSplitVectorElementType(EVT VT) const;

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