Searched refs:SReg (Results 1 - 8 of 8) sorted by relevance
| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| H A D | RegisterScavenging.cpp | 387 unsigned SReg = findSurvivorReg(I, Candidates, 25, UseMI); local
390 if (!isAliasUsed(SReg)) {
391 DEBUG(dbgs() << "Scavenged register: " << TRI->getName(SReg) << "\n");
392 return SReg;
408 Scavenged[SI].Reg = SReg;
412 if (!TRI->saveScavengerRegister(*MBB, I, UseMI, RC, SReg)) {
416 TII->storeRegToStackSlot(*MBB, I, SReg, true, Scavenged[SI].FrameIndex,
424 TII->loadRegFromStackSlot(*MBB, UseMI, SReg, Scavenged[SI].FrameIndex,
435 // Scavenged[SI].Reg = SReg;
437 DEBUG(dbgs() << "Scavenged register (with spill): " << TRI->getName(SReg) <<
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| /freebsd-10-stable/contrib/llvm/lib/Target/ARM/ |
| H A D | A15SDOptimizer.cpp | 107 unsigned getDPRLaneFromSPR(unsigned SReg);
122 unsigned getPrefSPRLane(unsigned SReg);
151 unsigned A15SDOptimizer::getDPRLaneFromSPR(unsigned SReg) { argument
152 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1,
160 unsigned A15SDOptimizer::getPrefSPRLane(unsigned SReg) { argument
161 if (!TRI->isVirtualRegister(SReg))
162 return getDPRLaneFromSPR(SReg);
164 MachineInstr *MI = MRI->getVRegDef(SReg);
166 MachineOperand *MO = MI->findRegisterDefOperand(SReg);
173 SReg
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| H A D | ARMAsmPrinter.cpp | 76 unsigned SReg = Reg - ARM::S0; local
77 bool odd = SReg & 0x1;
78 unsigned Rx = 256 + (SReg >> 1);
83 OutStreamer.AddComment(Twine(SReg));
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| H A D | ARMBaseInstrInfo.cpp | 3976 unsigned SReg, unsigned &Lane) {
3977 unsigned DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_0, &ARM::DPRRegClass);
3984 DReg = TRI->getMatchingSuperReg(SReg, ARM::ssub_1, &ARM::DPRRegClass);
3975 getCorrespondingDRegAndLane(const TargetRegisterInfo *TRI, unsigned SReg, unsigned &Lane) argument
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| /freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
| H A D | VirtRegMap.h | 137 /// @brief records virtReg is a split live interval from SReg.
138 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { argument
139 Virt2SplitMap[virtReg] = SReg;
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| /freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/ |
| H A D | PPCRegisterInfo.cpp | 653 SReg = MF.getRegInfo().createVirtualRegister(RC); local
658 BuildMI(MBB, II, dl, TII.get(is64Bit ? PPC::ORI8 : PPC::ORI), SReg)
682 MI.getOperand(OperandBase + 1).ChangeToRegister(SReg, false, false, true);
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| /freebsd-10-stable/contrib/llvm/tools/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ |
| H A D | MemRegion.h | 1087 const MemRegion *SReg)
1088 : TypedValueRegion(SReg, CXXBaseObjectRegionKind), Data(RD, IsVirtual) {}
1091 bool IsVirtual, const MemRegion *SReg);
1086 CXXBaseObjectRegion(const CXXRecordDecl *RD, bool IsVirtual, const MemRegion *SReg) argument
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| /freebsd-10-stable/contrib/llvm/tools/clang/lib/StaticAnalyzer/Core/ |
| H A D | MemRegion.cpp | 413 const MemRegion *SReg) {
416 ID.AddPointer(SReg);
410 ProfileRegion(llvm::FoldingSetNodeID &ID, const CXXRecordDecl *RD, bool IsVirtual, const MemRegion *SReg) argument
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