Searched refs:RCI (Results 1 - 11 of 11) sorted by relevance
| /freebsd-10-stable/contrib/llvm/lib/CodeGen/ |
| H A D | RegisterClassInfo.cpp | 79 RCInfo &RCI = RegClass[RC->getID()]; local
84 if (!RCI.Order)
85 RCI.Order.reset(new MCPhysReg[NumRegs]);
110 RCI.Order[N++] = PhysReg;
114 RCI.NumRegs = N + CSRAlias.size();
115 assert (RCI.NumRegs <= NumRegs && "Allocation order larger than regclass");
123 RCI.Order[N++] = PhysReg;
128 if (StressRA && RCI.NumRegs > StressRA)
129 RCI.NumRegs = StressRA;
133 if (Super != RC && getNumAllocatableRegs(Super) > RCI
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| H A D | TargetRegisterInfo.cpp | 192 for (SuperRegClassIterator RCI(B, this); RCI.isValid(); ++RCI)
193 if (RCI.getSubReg() == Idx)
196 return firstCommonClass(RCI.getMask(), A->getSubClassMask(), this);
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| H A D | AggressiveAntiDepBreaker.h | 134 const RegisterClassInfo &RCI,
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| H A D | RegisterPressure.cpp | 188 RCI = rci;
619 const RegisterClassInfo *RCI,
629 unsigned Limit = RCI->getRegPressureSetLimit(i);
761 computeExcessPressureDelta(SavedPressure, CurrSetPressure, Delta, RCI,
827 unsigned Limit = RCI->getRegPressureSetLimit(PSetID);
955 computeExcessPressureDelta(SavedPressure, CurrSetPressure, Delta, RCI,
616 computeExcessPressureDelta(ArrayRef<unsigned> OldPressureVec, ArrayRef<unsigned> NewPressureVec, RegPressureDelta &Delta, const RegisterClassInfo *RCI, ArrayRef<unsigned> LiveThruPressureVec) argument
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| H A D | PostRASchedulerList.cpp | 205 AliasAnalysis *AA, const RegisterClassInfo &RCI,
221 (AntiDepBreaker *)new AggressiveAntiDepBreaker(MF, RCI, CriticalPathRCs) :
223 (AntiDepBreaker *)new CriticalAntiDepBreaker(MF, RCI) : NULL));
203 SchedulePostRATDList( MachineFunction &MF, MachineLoopInfo &MLI, MachineDominatorTree &MDT, AliasAnalysis *AA, const RegisterClassInfo &RCI, TargetSubtargetInfo::AntiDepBreakMode AntiDepMode, SmallVectorImpl<const TargetRegisterClass*> &CriticalPathRCs) argument
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| H A D | CriticalAntiDepBreaker.cpp | 30 CriticalAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI) : argument
35 RegClassInfo(RCI),
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| H A D | TargetLoweringBase.cpp | 908 for (SuperRegClassIterator RCI(RC, TRI); RCI.isValid(); ++RCI)
909 SuperRegRC.setBitsInMask(RCI.getMask());
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| H A D | AggressiveAntiDepBreaker.cpp | 117 const RegisterClassInfo &RCI,
123 RegClassInfo(RCI),
116 AggressiveAntiDepBreaker(MachineFunction& MFi, const RegisterClassInfo &RCI, TargetSubtargetInfo::RegClassVector& CriticalPathRCs) argument
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| /freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/ |
| H A D | RegisterClassInfo.h | 72 const RCInfo &RCI = RegClass[RC->getID()]; local
73 if (Tag != RCI.Tag)
75 return RCI;
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| H A D | RegisterPressure.h | 253 const RegisterClassInfo *RCI;
288 MF(0), TRI(0), RCI(0), LIS(0), MBB(0), P(rp), RequireIntervals(true),
292 MF(0), TRI(0), RCI(0), LIS(0), MBB(0), P(rp), RequireIntervals(false),
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| /freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | TargetLowering.cpp | 2076 for (TargetRegisterInfo::regclass_iterator RCI = RI->regclass_begin(),
2077 E = RI->regclass_end(); RCI != E; ++RCI) {
2078 const TargetRegisterClass *RC = *RCI;
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