Searched refs:Cycles (Results 1 - 10 of 10) sorted by relevance

/freebsd-10-stable/contrib/llvm/lib/Target/X86/
H A DX86PadShortFunction.cpp40 // Cycles - Number of cycles until return if HasReturn is true, otherwise
42 unsigned int Cycles; member in struct:__anon2692::VisitedBBInfo
44 VisitedBBInfo() : HasReturn(false), Cycles(0) {}
45 VisitedBBInfo(bool HasReturn, unsigned int Cycles) argument
46 : HasReturn(HasReturn), Cycles(Cycles) {}
62 unsigned int Cycles = 0);
65 unsigned int &Cycles);
113 unsigned int Cycles = 0; local
119 Cycles
144 findReturns(MachineBasicBlock *MBB, unsigned int Cycles) argument
168 cyclesUntilReturn(MachineBasicBlock *MBB, unsigned int &Cycles) argument
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/freebsd-10-stable/contrib/llvm/include/llvm/MC/
H A DMCSchedule.h52 unsigned Cycles; member in struct:llvm::MCWriteProcResEntry
55 return ProcResourceIdx == Other.ProcResourceIdx && Cycles == Other.Cycles;
65 int Cycles; member in struct:llvm::MCWriteLatencyEntry
69 return Cycles == Other.Cycles && WriteResourceID == Other.WriteResourceID;
84 int Cycles; member in struct:llvm::MCReadAdvanceEntry
88 && Cycles == Other.Cycles;
H A DMCSubtargetInfo.h126 return I->Cycles;
/freebsd-10-stable/contrib/llvm/lib/CodeGen/
H A DTargetSchedule.cpp96 static unsigned capLatency(int Cycles) { argument
97 return Cycles >= 0 ? Cycles : 1000;
195 unsigned Latency = capLatency(WLEntry->Cycles);
246 Latency = std::max(Latency, capLatency(WLEntry->Cycles));
H A DMachineTraceMetrics.cpp118 PRCycles[PI->ProcResourceIdx] += PI->Cycles;
573 Cycles.erase(I);
775 unsigned Len = LIR.Height + Cycles[DefMI].Depth;
852 unsigned DepCycle = Cycles.lookup(Dep.DefMI).Depth;
860 InstrCycles &MICycles = Cycles[UseMI];
1065 unsigned Height = TBI.Succ ? Cycles.lookup(PHI).Height : 0;
1104 InstrCycles &MICycles = Cycles[MI];
1222 PRCycles += (PI->Cycles * TE.MTM.SchedModel.getResourceFactor(K));
H A DMachineScheduler.cpp1600 unsigned countResource(unsigned PIdx, unsigned Cycles, unsigned ReadyCycle);
1696 RemainingCounts[PIdx] += (Factor * PI->Cycles);
2073 /// \param Cycles indicates the number of consecutive (non-pipelined) cycles
2079 countResource(unsigned PIdx, unsigned Cycles, unsigned ReadyCycle) { argument
2081 unsigned Count = Factor * Cycles;
2083 << " +" << Cycles << "x" << Factor << "u\n");
2172 countResource(PI->ProcResourceIdx, PI->Cycles, ReadyCycle);
2312 ResDelta.CritResources += PI->Cycles;
2314 ResDelta.DemandedResources += PI->Cycles;
/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/
H A DMachineTraceMetrics.h278 return TE.Cycles.lookup(MI);
296 DenseMap<const MachineInstr*, InstrCycles> Cycles; member in class:llvm::MachineTraceMetrics::Ensemble
360 // Cycles consumed on each processor resource per block.
/freebsd-10-stable/contrib/llvm/utils/TableGen/
H A DSubtargetEmitter.cpp90 void ExpandProcResources(RecVec &PRVec, std::vector<int64_t> &Cycles,
307 int Cycles = Stage->getValueAsInt("Cycles"); local
308 ItinString += " { " + itostr(Cycles) + ", ";
781 std::vector<int64_t> &Cycles,
784 Cycles.resize(PRVec.size(), 1);
803 Cycles.push_back(Cycles[i]);
822 Cycles.push_back(Cycles[
780 ExpandProcResources(RecVec &PRVec, std::vector<int64_t> &Cycles, const CodeGenProcModel &PM) argument
961 std::vector<int64_t> Cycles = local
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/freebsd-10-stable/contrib/llvm/lib/Target/R600/
H A DR600InstrInfo.cpp419 unsigned Cycles[3] = { 2, 1, 0};
420 return Cycles[Op];
423 unsigned Cycles[3] = { 1, 2, 2};
424 return Cycles[Op];
427 unsigned Cycles[3] = { 2, 1, 2};
428 return Cycles[Op];
431 unsigned Cycles[3] = { 2, 2, 1};
432 return Cycles[Op];
/freebsd-10-stable/contrib/llvm/lib/MC/MCDisassembler/
H A DDisassembler.cpp235 Latency = std::max(Latency, WLEntry->Cycles);

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