Searched refs:Br (Results 1 - 25 of 30) sorted by relevance

12

/freebsd-10-stable/contrib/llvm/lib/Target/Mips/
H A DMipsLongBranch.cpp57 MachineInstr *Br; member in struct:__anon2541::MBBInfo
59 MBBInfo() : Size(0), HasLongBranch(false), Br(0) {}
81 int64_t computeOffset(const MachineInstr *Br);
82 void replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL,
103 /// Iterate over list of Br's operands and search for a MachineBasicBlock
105 static MachineBasicBlock *getTargetMBB(const MachineInstr &Br) { argument
106 for (unsigned I = 0, E = Br.getDesc().getNumOperands(); I < E; ++I) {
107 const MachineOperand &MO = Br.getOperand(I);
185 ReverseIter Br = getNonDebugInstr(MBB->rbegin(), End); local
187 if ((Br !
196 computeOffset(const MachineInstr *Br) argument
218 replaceBranch(MachineBasicBlock &MBB, Iter Br, DebugLoc DL, MachineBasicBlock *MBBOpnd) argument
[all...]
H A DMipsConstantIslandPass.cpp310 bool fixupImmediateBr(ImmBranch &Br);
311 bool fixupConditionalBr(ImmBranch &Br);
312 bool fixupUnconditionalBr(ImmBranch &Br);
1381 bool MipsConstantIslands::fixupImmediateBr(ImmBranch &Br) { argument
1382 MachineInstr *MI = Br.MI;
1386 if (isBBInRange(MI, DestBB, Br.MaxDisp))
1389 if (!Br.isCond)
1390 return fixupUnconditionalBr(Br);
1391 return fixupConditionalBr(Br);
1399 MipsConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { argument
1419 fixupConditionalBr(ImmBranch &Br) argument
[all...]
/freebsd-10-stable/contrib/llvm/lib/Target/AArch64/
H A DAArch64BranchFixupPass.cpp150 bool fixupImmediateBr(ImmBranch &Br);
151 bool fixupConditionalBr(ImmBranch &Br);
450 bool AArch64BranchFixup::fixupImmediateBr(ImmBranch &Br) { argument
451 MachineInstr *MI = Br.MI;
462 if (isBBInRange(MI, DestBB, Br.OffsetBits))
465 assert(Br.IsCond && "Only conditional branches should need fixup");
466 return fixupConditionalBr(Br);
473 AArch64BranchFixup::fixupConditionalBr(ImmBranch &Br) { argument
474 MachineInstr *MI = Br.MI;
520 MI = Br
[all...]
/freebsd-10-stable/contrib/llvm/lib/Target/ARM/
H A DARMConstantIslandPass.cpp299 bool fixupImmediateBr(ImmBranch &Br);
300 bool fixupConditionalBr(ImmBranch &Br);
301 bool fixupUnconditionalBr(ImmBranch &Br);
1530 bool ARMConstantIslands::fixupImmediateBr(ImmBranch &Br) { argument
1531 MachineInstr *MI = Br.MI;
1535 if (isBBInRange(MI, DestBB, Br.MaxDisp))
1538 if (!Br.isCond)
1539 return fixupUnconditionalBr(Br);
1540 return fixupConditionalBr(Br);
1548 ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { argument
1571 fixupConditionalBr(ImmBranch &Br) argument
1753 ImmBranch &Br = ImmBranches[i]; local
[all...]
H A DARMFastISel.cpp2893 case Instruction::Br:
/freebsd-10-stable/contrib/llvm/lib/Transforms/Scalar/
H A DLoopIdiomRecognize.cpp116 Value *matchCondition (BranchInst *Br, BasicBlock *NonZeroTarget) const;
283 if (BranchInst *Br = getBranch(BB)) {
284 return Br->isUnconditional() && BB->size() == 1;
290 BranchInst *Br = getBranch(BB); local
291 return Br ? Br->getCondition() : 0;
296 BranchInst *Br = getBranch(BB); local
297 return Br && Br->isConditional() ? BB : 0;
346 Value *NclPopcountRecognize::matchCondition (BranchInst *Br, argument
[all...]
/freebsd-10-stable/contrib/llvm/tools/clang/lib/CodeGen/
H A DCGCleanup.cpp322 if (llvm::BranchInst *Br = dyn_cast<llvm::BranchInst>(Term)) {
323 assert(Br->isUnconditional());
327 llvm::SwitchInst::Create(Load, Br->getSuccessor(0), 4, Block);
328 Br->eraseFromParent();
438 llvm::BranchInst *Br = dyn_cast<llvm::BranchInst>(Pred->getTerminator());
439 if (!Br || Br->isConditional()) return Entry;
440 assert(Br->getSuccessor(0) == Entry);
449 Br->eraseFromParent();
505 if (llvm::BranchInst *Br
[all...]
/freebsd-10-stable/contrib/llvm/lib/Transforms/Utils/
H A DInlineFunction.cpp816 TerminatorInst *Br = OrigBB->getTerminator(); local
817 assert(Br && Br->getOpcode() == Instruction::Br &&
819 Br->setOperand(0, FirstNewBlock);
907 assert(cast<BranchInst>(Br)->isUnconditional() && "splitBasicBlock broken!");
908 BasicBlock *CalleeEntry = cast<BranchInst>(Br)->getSuccessor(0);
913 OrigBB->getInstList().splice(Br, CalleeEntry->getInstList());
916 OrigBB->getInstList().erase(Br);
/freebsd-10-stable/contrib/llvm/lib/Target/MSP430/
H A DMSP430InstrInfo.cpp117 I->getOpcode() != MSP430::Br &&
196 if (I->getOpcode() == MSP430::Br ||
/freebsd-10-stable/contrib/llvm/lib/Transforms/ObjCARC/
H A DObjCARCUtil.cpp213 case Instruction::Ret: case Instruction::Br:
/freebsd-10-stable/contrib/llvm/lib/Analysis/
H A DCostModel.cpp380 case Instruction::Br: {
H A DValueTracking.cpp2052 case Instruction::Br:
/freebsd-10-stable/usr.bin/calendar/calendars/fr_FR.ISO8859-1/
H A Dcalendar.proverbes69 Br�le le bl�.
/freebsd-10-stable/usr.bin/calendar/calendars/hu_HU.ISO8859-2/
H A Dcalendar.nevnapok298 10/06 Br�n�, Ren�ta
/freebsd-10-stable/contrib/llvm/lib/IR/
H A DInstruction.cpp190 case Br: return "br";
H A DInstructions.cpp732 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
740 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
752 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
761 : TerminatorInst(Type::getVoidTy(IfTrue->getContext()), Instruction::Br,
774 TerminatorInst(Type::getVoidTy(BI.getContext()), Instruction::Br,
/freebsd-10-stable/contrib/llvm/tools/lldb/source/Expression/
H A DIRInterpreter.cpp473 case Instruction::Br:
878 case Instruction::Br:
885 log->Printf("getOpcode() returns Br, but instruction is not a BranchInst");
/freebsd-10-stable/contrib/llvm/lib/AsmParser/
H A DLLLexer.cpp672 INSTKEYWORD(br, Br);
/freebsd-10-stable/contrib/llvm/lib/CodeGen/SelectionDAG/
H A DFastISel.cpp1022 case Instruction::Br: {
/freebsd-10-stable/contrib/llvm/lib/CodeGen/
H A DTargetLoweringBase.cpp1248 case Br: return 0;
/freebsd-10-stable/contrib/llvm/lib/Bitcode/Writer/
H A DBitcodeWriter.cpp1284 case Instruction::Br:
/freebsd-10-stable/contrib/llvm/lib/Target/CppBackend/
H A DCPPBackend.cpp1117 case Instruction::Br: {
/freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/
H A DPPCFastISel.cpp1750 case Instruction::Br:
/freebsd-10-stable/contrib/llvm/lib/Transforms/Vectorize/
H A DLoopVectorize.cpp1600 // Use this IR builder to create the loop instructions (Phi, Br, Cmp)
2583 case Instruction::Br:
4882 case Instruction::Br: {
/freebsd-10-stable/contrib/llvm/include/llvm/IR/
H A DInstructions.h2425 return (I->getOpcode() == Instruction::Br);

Completed in 334 milliseconds

12