Searched refs:BitVector (Results 1 - 25 of 90) sorted by relevance

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/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/
H A DRegisterScavenging.h20 #include "llvm/ADT/BitVector.h"
63 BitVector CalleeSavedRegs;
68 BitVector RegsAvailable;
72 BitVector KillRegs, DefRegs;
117 void getRegsUsed(BitVector &used, bool includeReserved);
121 BitVector getRegsAvailable(const TargetRegisterClass *RC);
180 void setUsed(BitVector &Regs) {
183 void setUnused(BitVector &Regs) {
192 void addRegWithSubRegs(BitVector &BV, unsigned Reg);
200 BitVector
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H A DLiveRegMatrix.h27 #include "llvm/ADT/BitVector.h"
59 BitVector RegMaskUsable;
H A DRegisterClassInfo.h21 #include "llvm/ADT/BitVector.h"
63 BitVector Reserved;
/freebsd-10-stable/contrib/llvm/tools/clang/include/clang/Analysis/Analyses/
H A DReachableCode.h24 class BitVector;
50 llvm::BitVector &Reachable);
H A DCFGReachabilityAnalysis.h19 #include "llvm/ADT/BitVector.h"
33 typedef llvm::BitVector ReachableSet;
/freebsd-10-stable/contrib/llvm/include/llvm/ADT/
H A DBitVector.h1 //===- llvm/ADT/BitVector.h - Bit vectors -----------------------*- C++ -*-===//
10 // This file implements the BitVector class.
27 class BitVector { class in namespace:llvm
39 friend class BitVector;
47 reference(BitVector &b, unsigned Idx) {
73 /// BitVector default ctor - Creates an empty bitvector.
74 BitVector() : Size(0), Capacity(0) { function in class:llvm::BitVector
78 /// BitVector ctor - Creates a bitvector of specified number of bits. All
80 explicit BitVector(unsigned s, bool t = false) : Size(s) { function in class:llvm::BitVector
88 /// BitVector cop
89 BitVector(const BitVector &RHS) : Size(RHS.size()) { function in class:llvm::BitVector
102 BitVector(BitVector &&RHS) function in class:llvm::BitVector
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H A DSmallBitVector.h17 #include "llvm/ADT/BitVector.h"
32 // TODO: In "large" mode, a pointer to a BitVector is used, leading to an
88 BitVector *getPointer() const {
90 return reinterpret_cast<BitVector *>(X);
99 void switchToLarge(BitVector *BV) {
145 switchToLarge(new BitVector(s, t));
153 switchToLarge(new BitVector(*RHS.getPointer()));
261 BitVector *BV = new BitVector(N, t);
274 BitVector *B
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/freebsd-10-stable/contrib/llvm/lib/Target/R600/
H A DAMDGPURegisterInfo.h19 #include "llvm/ADT/BitVector.h"
37 virtual BitVector getReservedRegs(const MachineFunction &MF) const {
38 assert(!"Unimplemented"); return BitVector();
H A DR600RegisterInfo.h31 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
H A DSIRegisterInfo.h30 virtual BitVector getReservedRegs(const MachineFunction &MF) const;
H A DR600RegisterInfo.cpp28 BitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
29 BitVector Reserved(getNumRegs());
H A DSIRegisterInfo.cpp27 BitVector SIRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
28 BitVector Reserved(getNumRegs());
/freebsd-10-stable/contrib/llvm/lib/CodeGen/
H A DSpillPlacement.h37 class BitVector;
51 BitVector *ActiveNodes;
98 void prepare(BitVector &RegBundles);
H A DCriticalAntiDepBreaker.h20 #include "llvm/ADT/BitVector.h"
44 const BitVector AllocatableSet;
68 BitVector KeepRegs;
H A DAggressiveAntiDepBreaker.h21 #include "llvm/ADT/BitVector.h"
126 BitVector CriticalPathSet;
177 BitVector GetRenameRegisters(unsigned Reg);
H A DRegisterScavenging.cpp65 BitVector PR = MBB->getParent()->getFrameInfo()->getPristineRegs(MBB);
106 void RegScavenger::addRegWithSubRegs(BitVector &BV, unsigned Reg) {
249 void RegScavenger::getRegsUsed(BitVector &used, bool includeReserved) {
271 BitVector RegScavenger::getRegsAvailable(const TargetRegisterClass *RC) {
272 BitVector Mask(TRI->getNumRegs());
287 BitVector &Candidates,
365 BitVector Candidates =
380 BitVector Available = getRegsAvailable(RC);
H A DTargetRegisterInfo.cpp15 #include "llvm/ADT/BitVector.h"
131 const TargetRegisterClass *RC, BitVector &R){
138 BitVector TargetRegisterInfo::getAllocatableSet(const MachineFunction &MF,
140 BitVector Allocatable(getNumRegs());
154 BitVector Reserved = getReservedRegs(MF);
/freebsd-10-stable/contrib/llvm/lib/Target/MSP430/
H A DMSP430RegisterInfo.h40 BitVector getReservedRegs(const MachineFunction &MF) const;
/freebsd-10-stable/contrib/llvm/lib/Target/AArch64/
H A DAArch64RegisterInfo.h35 BitVector getReservedRegs(const MachineFunction &MF) const;
/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/
H A DHexagonRegisterInfo.h56 BitVector getReservedRegs(const MachineFunction &MF) const;
/freebsd-10-stable/contrib/llvm/lib/Target/Sparc/
H A DSparcRegisterInfo.h39 BitVector getReservedRegs(const MachineFunction &MF) const;
/freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/
H A DSystemZRegisterInfo.h57 virtual BitVector getReservedRegs(const MachineFunction &MF)
/freebsd-10-stable/contrib/llvm/lib/Target/XCore/
H A DXCoreRegisterInfo.h47 BitVector getReservedRegs(const MachineFunction &MF) const;
/freebsd-10-stable/contrib/llvm/lib/Target/NVPTX/
H A DNVPTXRegisterInfo.cpp19 #include "llvm/ADT/BitVector.h"
94 BitVector NVPTXRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
95 BitVector Reserved(getNumRegs());
/freebsd-10-stable/contrib/llvm/lib/Target/Mips/
H A DMipsRegisterInfo.h54 BitVector getReservedRegs(const MachineFunction &MF) const;

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