Searched refs:ttbr (Results 1 - 3 of 3) sorted by relevance
/barrelfish-master/kernel/include/arch/armv7/ |
H A D | cp15.h | 66 lpaddr_t ttbr; local 67 __asm volatile(" mrc p15, 0, %[ttbr], c2, c0, 0" : [ttbr] "=r" (ttbr)); 68 return ttbr; 73 lpaddr_t ttbr; local 74 __asm volatile(" mrc p15, 0, %[ttbr], c2, c0, 1" : [ttbr] "=r" (ttbr)); 75 return ttbr; 78 cp15_write_ttbr0(lpaddr_t ttbr) argument 83 cp15_write_ttbr1(lpaddr_t ttbr) argument [all...] |
/barrelfish-master/kernel/arch/armv7/ |
H A D | paging.c | 117 void paging_context_switch(lpaddr_t ttbr) argument 119 assert(ttbr >= phys_memory_start && 120 ttbr < phys_memory_start + RAM_WINDOW_SIZE); 122 if (ttbr != old_ttbr) 125 cp15_write_ttbr0(ttbr);
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/barrelfish-master/kernel/arch/armv8/ |
H A D | paging.c | 862 void paging_context_switch(lpaddr_t ttbr) argument 864 assert(ttbr < MEMORY_OFFSET); 865 //assert((ttbr & 0x3fff) == 0); 868 if (ttbr != old_ttbr) 870 armv8_TTBR0_EL1_wr(NULL, ttbr);
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