Searched refs:mem_avail (Results 1 - 6 of 6) sorted by relevance

/barrelfish-master/lib/devif/backends/net/mlx4/drivers/infiniband/hw/mthca/
H A Dmthca_profile.c77 u64 mem_base, mem_avail; local
125 mem_avail = dev_lim->hca.arbel.max_icm_sz;
128 mem_avail = dev->fw.tavor.fw_start - dev->ddr_start;
151 if (total_size > mem_avail) {
155 (unsigned long long) mem_avail);
173 (int) (total_size >> 10), (int) (mem_avail >> 10),
174 (int) ((mem_avail - total_size) >> 10));
/barrelfish-master/usr/mem_serv_dist/
H A Dmem_serv.c53 memsize_t mem_avail = 0; variable
186 log2ceil(info.u.ram.bytes), &mem_avail);
192 return do_free(&mm_percore, ramcap, base, bits, &mem_avail);
197 return mem_avail;
230 return do_alloc(&mm_percore, ret, bits, minbase, maxlimit, &mem_avail);
547 mem_avail = 0;
558 &percore_slot_alloc, &mem_avail, &mem_total);
584 mem_avail += fill_mm(&mm_percore, percore_mem, percore_bits, &mem_total);
597 && mem_avail > (1UL << (CNODE_BITS + OBJBITS_CTE)) * 2
603 && mem_avail > (
[all...]
H A Dmem_serv.h89 extern memsize_t mem_avail;
H A Dhybrid_support.c48 memsize_t mem_avail, mem_total; member in struct:pending_reply
122 err = b->tx_vtbl.available_response(b, NOP_CONT, r->mem_avail, r->mem_total);
204 r->mem_avail = mem_available;
H A Dsteal.c212 mem_avail += mem_to_add;
/barrelfish-master/usr/mem_serv/
H A Dmem_serv.c33 size_t mem_total = 0, mem_avail = 0; variable
135 mem_avail += mem_to_add;
252 err = b->tx_vtbl.available_response(b, NOP_CONT, mem_avail, mem_total);
331 mem_avail -= 1UL << bits;
512 mem_avail += bi->regions[i].mr_bytes;
528 && mem_avail > (1UL << (CNODE_BITS + OBJBITS_CTE)) * 2
546 mem_avail / 1024 / 1024, mem_total / 1024 / 1024);

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