Searched refs:cacheable (Results 1 - 3 of 3) sorted by relevance

/barrelfish-master/include/target/arm/barrelfish_kpi/
H A Dpaging_arm_v7.h91 uint32_t cacheable :1; member in struct:arm_l1_entry::__anon55
109 uint32_t cacheable :1; member in struct:arm_l1_entry::__anon56
144 uint32_t cacheable :1; member in struct:arm_l2_entry::__anon58
159 uint32_t cacheable :1; member in struct:arm_l2_entry::__anon59
/barrelfish-master/kernel/arch/armv7/
H A Dpaging_init.c58 l1.section.cacheable = 0;
81 cacheable memory. See ARMv7 ARM Table B3-10. */
83 l1.section.cacheable = 1;
H A Dpaging.c48 entry->small_page.cacheable =
96 l1.section.cacheable = 0;
158 e_l2->small_page.cacheable= 1;
273 pte.section.cacheable,
289 pte.super_section.cacheable,
398 entry->section.cacheable = (kpi_paging_flags & KPI_PAGING_FLAGS_NOCACHE)? 0: 1;

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