Searched refs:CPU_CONTROL_DC_ENABLE (Results 1 - 1 of 1) sorted by relevance

/barrelfish-master/include/arch/arm/machine/
H A Darmreg.h260 #define CPU_CONTROL_DC_ENABLE 0x00000004 /* C: IDC/DC enable */ macro
287 #define CPU_CONTROL_IDC_ENABLE CPU_CONTROL_DC_ENABLE

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