Searched refs:writeisac (Results 1 - 25 of 74) sorted by relevance

123

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/isdn/hisax/
H A Dicc.c45 cs->writeisac(cs, ICC_CIX0, (command << 2) | 3);
124 cs->writeisac(cs, ICC_CMDR, 0x80);
131 cs->writeisac(cs, ICC_CMDR, 0x80);
166 cs->writeisac(cs, ICC_CMDR, more ? 0x8 : 0xa);
209 cs->writeisac(cs, ICC_CMDR, 0x80);
318 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
326 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
337 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
348 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
356 cs->writeisac(c
[all...]
H A Disac.c44 cs->writeisac(cs, ISAC_CIX0, (command << 2) | 3);
127 cs->writeisac(cs, ISAC_CMDR, 0x80);
134 cs->writeisac(cs, ISAC_CMDR, 0x80);
169 cs->writeisac(cs, ISAC_CMDR, more ? 0x8 : 0xa);
212 cs->writeisac(cs, ISAC_CMDR, 0x80);
321 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
329 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
340 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
351 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
359 cs->writeisac(c
[all...]
H A Dipacx.c67 cs->writeisac(cs, IPACX_CIX0, (command << 4) | 0x0E);
163 cs->writeisac(cs, IPACX_CDA_TSDP10, 0x80); // Timeslot 0 is B1
164 cs->writeisac(cs, IPACX_CDA_TSDP11, 0x81); // Timeslot 0 is B1
168 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x0a);
171 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x0a);
174 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x14);
177 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x14);
227 cs->writeisac(cs, IPACX_CMDRD, 0x01); // Tx reset, generates XPR
247 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
256 cs->writeisac(c
[all...]
H A Damd7930_fn.h20 #define wByteAMD(cs, reg, val) cs->writeisac(cs, reg, val)
H A Darcofi.c47 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
49 cs->writeisac(cs, ISAC_MOX1, cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
51 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
H A Disurf.c164 cs->writeisac(cs, ISAC_MASK, 0);
166 cs->writeisac(cs, ISAC_CMDR, 0x41);
187 cs->writeisac(cs, ISAC_MASK, 0);
188 cs->writeisac(cs, ISAC_CMDR, 0x41);
283 cs->writeisac = &WriteISAC;
H A Dtelespci.c61 writeisac(void __iomem *adr, u_char off, u_char data) function
189 writeisac(cs->hw.teles0.membase, offset, value);
250 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF);
251 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
337 cs->writeisac = &WriteISAC;
H A Dteles0.c37 writeisac(void __iomem *adr, u_char off, u_char data) function
106 writeisac(cs->hw.teles0.membase, offset, value);
176 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF);
177 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
349 cs->writeisac = &WriteISAC;
H A Dteleint.c247 cs->writeisac(cs, ISAC_MASK, 0);
248 cs->writeisac(cs, ISAC_CMDR, 0x41);
327 cs->writeisac = &WriteISAC;
H A Dw6692.h15 #define writeW6692 writeisac
H A Dhfc_2bds0.c977 cs->writeisac(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */
979 cs->writeisac(cs, HFCD_STATES, 3); /* HFC ST 2 */
981 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
982 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
988 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
994 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
1000 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
1071 cs->writeisac = &writereghfcd;
H A Dnj_s.c142 cs->writeisac(cs, ISAC_MASK, 0);
244 cs->writeisac = &NETjet_WriteIC;
H A Dnj_u.c122 cs->writeisac(cs, ICC_MASK, 0);
208 cs->writeisac = &NETjet_WriteIC;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/isdn/hisax/
H A Dicc.c45 cs->writeisac(cs, ICC_CIX0, (command << 2) | 3);
124 cs->writeisac(cs, ICC_CMDR, 0x80);
131 cs->writeisac(cs, ICC_CMDR, 0x80);
166 cs->writeisac(cs, ICC_CMDR, more ? 0x8 : 0xa);
209 cs->writeisac(cs, ICC_CMDR, 0x80);
318 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
326 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
337 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
348 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
356 cs->writeisac(c
[all...]
H A Disac.c44 cs->writeisac(cs, ISAC_CIX0, (command << 2) | 3);
127 cs->writeisac(cs, ISAC_CMDR, 0x80);
134 cs->writeisac(cs, ISAC_CMDR, 0x80);
169 cs->writeisac(cs, ISAC_CMDR, more ? 0x8 : 0xa);
212 cs->writeisac(cs, ISAC_CMDR, 0x80);
321 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
329 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
340 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
351 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
359 cs->writeisac(c
[all...]
H A Dipacx.c67 cs->writeisac(cs, IPACX_CIX0, (command << 4) | 0x0E);
163 cs->writeisac(cs, IPACX_CDA_TSDP10, 0x80); // Timeslot 0 is B1
164 cs->writeisac(cs, IPACX_CDA_TSDP11, 0x81); // Timeslot 0 is B1
168 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x0a);
171 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x0a);
174 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x14);
177 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x14);
227 cs->writeisac(cs, IPACX_CMDRD, 0x01); // Tx reset, generates XPR
247 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
256 cs->writeisac(c
[all...]
H A Damd7930_fn.h20 #define wByteAMD(cs, reg, val) cs->writeisac(cs, reg, val)
H A Darcofi.c47 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
49 cs->writeisac(cs, ISAC_MOX1, cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
51 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
H A Disurf.c164 cs->writeisac(cs, ISAC_MASK, 0);
166 cs->writeisac(cs, ISAC_CMDR, 0x41);
187 cs->writeisac(cs, ISAC_MASK, 0);
188 cs->writeisac(cs, ISAC_CMDR, 0x41);
283 cs->writeisac = &WriteISAC;
H A Dtelespci.c61 writeisac(void __iomem *adr, u_char off, u_char data) function
189 writeisac(cs->hw.teles0.membase, offset, value);
250 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF);
251 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
337 cs->writeisac = &WriteISAC;
H A Dteles0.c37 writeisac(void __iomem *adr, u_char off, u_char data) function
106 writeisac(cs->hw.teles0.membase, offset, value);
176 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0xFF);
177 writeisac(cs->hw.teles0.membase, ISAC_MASK, 0x0);
349 cs->writeisac = &WriteISAC;
H A Dteleint.c247 cs->writeisac(cs, ISAC_MASK, 0);
248 cs->writeisac(cs, ISAC_CMDR, 0x41);
327 cs->writeisac = &WriteISAC;
H A Dw6692.h15 #define writeW6692 writeisac
H A Dhfc_2bds0.c977 cs->writeisac(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */
979 cs->writeisac(cs, HFCD_STATES, 3); /* HFC ST 2 */
981 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
982 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
988 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
994 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
1000 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
1071 cs->writeisac = &writereghfcd;
H A Dnj_s.c142 cs->writeisac(cs, ISAC_MASK, 0);
244 cs->writeisac = &NETjet_WriteIC;

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