Searched refs:watchhi (Results 1 - 11 of 11) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/kernel/
H A Dwatch.c29 write_c0_watchhi3(0x40000007 | watches->watchhi[3]);
32 write_c0_watchhi2(0x40000007 | watches->watchhi[2]);
35 write_c0_watchhi1(0x40000007 | watches->watchhi[1]);
38 write_c0_watchhi0(0x40000007 | watches->watchhi[0]);
43 * Read back the watchhi registers so the user space debugger has
55 watches->watchhi[3] = (read_c0_watchhi3() & 0x0fff);
57 watches->watchhi[2] = (read_c0_watchhi2() & 0x0fff);
59 watches->watchhi[1] = (read_c0_watchhi1() & 0x0fff);
61 watches->watchhi[0] = (read_c0_watchhi0() & 0x0fff);
64 (watches->watchhi[
[all...]
H A Dptrace.c196 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
197 &addr->WATCH_STYLE.watchhi[i]);
203 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
237 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
247 child->thread.watch.mips3264.watchhi[i] = ht[i];
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/kernel/
H A Dwatch.c29 write_c0_watchhi3(0x40000007 | watches->watchhi[3]);
32 write_c0_watchhi2(0x40000007 | watches->watchhi[2]);
35 write_c0_watchhi1(0x40000007 | watches->watchhi[1]);
38 write_c0_watchhi0(0x40000007 | watches->watchhi[0]);
43 * Read back the watchhi registers so the user space debugger has
55 watches->watchhi[3] = (read_c0_watchhi3() & 0x0fff);
57 watches->watchhi[2] = (read_c0_watchhi2() & 0x0fff);
59 watches->watchhi[1] = (read_c0_watchhi1() & 0x0fff);
61 watches->watchhi[0] = (read_c0_watchhi0() & 0x0fff);
64 (watches->watchhi[
[all...]
H A Dptrace.c196 __put_user(child->thread.watch.mips3264.watchhi[i] & 0xfff,
197 &addr->WATCH_STYLE.watchhi[i]);
203 __put_user(0, &addr->WATCH_STYLE.watchhi[i]);
237 __get_user(ht[i], &addr->WATCH_STYLE.watchhi[i]);
247 child->thread.watch.mips3264.watchhi[i] = ht[i];
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/
H A Dptrace.h84 /* Lower 16 bits of watchhi. */
85 unsigned short watchhi[8]; member in struct:mips32_watch_regs
90 * bits 3 - 11 -- Valid watchhi mask bits.
99 unsigned short watchhi[8]; member in struct:mips64_watch_regs
H A Dprocessor.h131 /* Only the mask and IRW bits from watchhi. */
132 u16 watchhi[NUM_WATCH_REGS]; member in struct:mips3264_watch_reg_state
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/
H A Dptrace.h84 /* Lower 16 bits of watchhi. */
85 unsigned short watchhi[8]; member in struct:mips32_watch_regs
90 * bits 3 - 11 -- Valid watchhi mask bits.
99 unsigned short watchhi[8]; member in struct:mips64_watch_regs
H A Dprocessor.h131 /* Only the mask and IRW bits from watchhi. */
132 u16 watchhi[NUM_WATCH_REGS]; member in struct:mips3264_watch_reg_state
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/
H A Dsbmips.h448 /* CP0 register 19: watchhi. */
449 _cp0_get_reg_u32 (watchhi, C0_WATCHHI, 0)
450 _cp0_set_reg_u32 (watchhi, C0_WATCHHI, 0)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm5200/include/
H A Dr5kc0.h365 $watchhi = $19
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/rm7000/include/
H A Dr5kc0.h366 $watchhi = $19

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