Searched refs:plla (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-at91/
H A Dboard-sam9260ek.c106 struct clk *plla; local
109 plla = clk_get(NULL, "plla");
114 clk_set_parent(pck0, plla);
115 clk_put(plla);
H A Dclock.c95 static struct clk plla = { variable in typeref:struct:clk
96 .name = "plla",
205 return &plla;
607 &plla,
685 plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
687 if (plla.rate_hz > 300000000)
690 if (plla.rate_hz > 800000000)
693 if (plla.rate_hz > 209000000)
697 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla
[all...]
H A Dboard-sam9261ek.c295 struct clk *plla; local
298 plla = clk_get(NULL, "plla");
303 clk_set_parent(pck2, plla);
304 clk_put(plla);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-at91/
H A Dboard-sam9260ek.c106 struct clk *plla; local
109 plla = clk_get(NULL, "plla");
114 clk_set_parent(pck0, plla);
115 clk_put(plla);
H A Dclock.c95 static struct clk plla = { variable in typeref:struct:clk
96 .name = "plla",
205 return &plla;
607 &plla,
685 plla.rate_hz = at91_pll_rate(&plla, main_clock, at91_sys_read(AT91_CKGR_PLLAR));
687 if (plla.rate_hz > 300000000)
690 if (plla.rate_hz > 800000000)
693 if (plla.rate_hz > 209000000)
697 pr_info("Clocks: PLLA overclocked, %ld MHz\n", plla
[all...]
H A Dboard-sam9261ek.c295 struct clk *plla; local
298 plla = clk_get(NULL, "plla");
303 clk_set_parent(pck2, plla);
304 clk_put(plla);

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