Searched refs:pll0_sysclk2 (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-davinci/
H A Dda830.c63 static struct clk pll0_sysclk2 = { variable in typeref:struct:clk
64 .name = "pll0_sysclk2",
122 .parent = &pll0_sysclk2,
129 .parent = &pll0_sysclk2,
136 .parent = &pll0_sysclk2,
143 .parent = &pll0_sysclk2,
150 .parent = &pll0_sysclk2,
157 .parent = &pll0_sysclk2,
164 .parent = &pll0_sysclk2,
171 .parent = &pll0_sysclk2,
[all...]
H A Dda850.c77 static struct clk pll0_sysclk2 = { variable in typeref:struct:clk
78 .name = "pll0_sysclk2",
197 .parent = &pll0_sysclk2,
204 .parent = &pll0_sysclk2,
211 .parent = &pll0_sysclk2,
218 .parent = &pll0_sysclk2,
225 .parent = &pll0_sysclk2,
233 .parent = &pll0_sysclk2,
241 .parent = &pll0_sysclk2,
247 .parent = &pll0_sysclk2,
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-davinci/
H A Dda830.c63 static struct clk pll0_sysclk2 = { variable in typeref:struct:clk
64 .name = "pll0_sysclk2",
122 .parent = &pll0_sysclk2,
129 .parent = &pll0_sysclk2,
136 .parent = &pll0_sysclk2,
143 .parent = &pll0_sysclk2,
150 .parent = &pll0_sysclk2,
157 .parent = &pll0_sysclk2,
164 .parent = &pll0_sysclk2,
171 .parent = &pll0_sysclk2,
[all...]
H A Dda850.c77 static struct clk pll0_sysclk2 = { variable in typeref:struct:clk
78 .name = "pll0_sysclk2",
197 .parent = &pll0_sysclk2,
204 .parent = &pll0_sysclk2,
211 .parent = &pll0_sysclk2,
218 .parent = &pll0_sysclk2,
225 .parent = &pll0_sysclk2,
233 .parent = &pll0_sysclk2,
241 .parent = &pll0_sysclk2,
247 .parent = &pll0_sysclk2,
[all...]

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