Searched refs:pinCPLD (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-lh7a40x/
H A Dirq-lpd7a40x.c91 int pinCPLD; local
96 pinCPLD = (cpld_version == 0x28) ? 7 : 3;
109 GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */
110 GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */
111 GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */
113 GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */
H A Darch-lpd7a40x.c242 int pinCPLD = (cpld_version == 0x28) ? 7 : 3; local
268 GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */
269 GPIO_INTTYPE1 &= ~(1 << pinCPLD); /* Level triggered */
270 GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */
272 GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-lh7a40x/
H A Dirq-lpd7a40x.c91 int pinCPLD; local
96 pinCPLD = (cpld_version == 0x28) ? 7 : 3;
109 GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */
110 GPIO_INTTYPE1 |= (1 << pinCPLD); /* Edge triggered */
111 GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */
113 GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */
H A Darch-lpd7a40x.c242 int pinCPLD = (cpld_version == 0x28) ? 7 : 3; local
268 GPIO_PFDD &= ~(1 << pinCPLD); /* Make input */
269 GPIO_INTTYPE1 &= ~(1 << pinCPLD); /* Level triggered */
270 GPIO_INTTYPE2 &= ~(1 << pinCPLD); /* Active low */
272 GPIO_GPIOFINTEN |= (1 << pinCPLD); /* Enable */

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