Searched refs:mux_reg (Results 1 - 22 of 22) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-davinci/
H A Dmux.h23 .mux_reg = PINMUX(muxreg), \
34 .mux_reg = INTMUX, \
45 .mux_reg = EVTMUX, \
H A Dmux.c67 reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);
79 __raw_writel(reg, pinmux_base + cfg->mux_reg);
93 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-davinci/
H A Dmux.h23 .mux_reg = PINMUX(muxreg), \
34 .mux_reg = INTMUX, \
45 .mux_reg = EVTMUX, \
H A Dmux.c67 reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);
79 __raw_writel(reg, pinmux_base + cfg->mux_reg);
93 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-spear/
H A Dpadmux.c24 * mux_reg: muxing configurations
30 struct pmx_reg mux_reg; member in struct:pmx
79 val = readl(pmx->base + pmx->mux_reg.offset);
106 mask = devs[i]->modes[j].mask & pmx->mux_reg.mask;
114 writel(val, pmx->base + pmx->mux_reg.offset);
147 pmx->mux_reg.offset = driver->mux_reg.offset;
148 pmx->mux_reg.mask = driver->mux_reg.mask;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-spear/
H A Dpadmux.c24 * mux_reg: muxing configurations
30 struct pmx_reg mux_reg; member in struct:pmx
79 val = readl(pmx->base + pmx->mux_reg.offset);
106 mask = devs[i]->modes[j].mask & pmx->mux_reg.mask;
114 writel(val, pmx->base + pmx->mux_reg.offset);
147 pmx->mux_reg.offset = driver->mux_reg.offset;
148 pmx->mux_reg.mask = driver->mux_reg.mask;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-omap/include/plat/
H A Dmux.h41 .mux_reg = FUNC_MUX_CTRL_##reg, \
55 .mux_reg = OMAP7XX_IO_CONF_##reg, \
66 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
78 .mux_reg = OMAP7XX_IO_CONF_##reg, \
88 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \
94 MUX_REG(mux_reg, mode_offset, mode) \
107 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \
112 MUX_REG_7XX(mux_reg, mode_offset, mode) \
113 PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
119 const unsigned int mux_reg; member in struct:pin_config
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/
H A Dmux.h41 .mux_reg = FUNC_MUX_CTRL_##reg, \
55 .mux_reg = OMAP7XX_IO_CONF_##reg, \
66 #define MUX_REG(reg, mode_offset, mode) .mux_reg = FUNC_MUX_CTRL_##reg, \
78 .mux_reg = OMAP7XX_IO_CONF_##reg, \
88 #define MUX_CFG(desc, mux_reg, mode_offset, mode, \
94 MUX_REG(mux_reg, mode_offset, mode) \
107 #define MUX_CFG_7XX(desc, mux_reg, mode_offset, mode, \
112 MUX_REG_7XX(mux_reg, mode_offset, mode) \
113 PULL_REG_7XX(mux_reg, pull_bit, pull_status) \
119 const unsigned int mux_reg; member in struct:pin_config
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-spear/include/plat/
H A Dpadmux.h78 * mux_reg: structure of device mux config register
86 struct pmx_reg mux_reg; member in struct:pmx_driver
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-spear/include/plat/
H A Dpadmux.h78 * mux_reg: structure of device mux config register
86 struct pmx_reg mux_reg; member in struct:pmx_driver
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-omap1/
H A Dmux.c355 if (cfg->mux_reg) {
359 reg_orig = omap_readl(cfg->mux_reg);
372 omap_writel(reg, cfg->mux_reg);
431 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-omap1/
H A Dmux.c355 if (cfg->mux_reg) {
359 reg_orig = omap_readl(cfg->mux_reg);
372 omap_writel(reg, cfg->mux_reg);
431 cfg->mux_reg_name, cfg->mux_reg, reg_orig, reg);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-tegra/
H A Dpinmux.c54 s8 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ member in struct:tegra_pingroup_desc
72 .mux_reg = REG_ ## mux_r, \
394 if (pingroups[pg].mux_reg == REG_N)
416 reg = pg_readl(TEGRA_PP_MUX_CTL(pingroups[pg].mux_reg));
419 pg_writel(reg, TEGRA_PP_MUX_CTL(pingroups[pg].mux_reg));
488 if (pingroups[pingroup].mux_reg != REG_N) {
815 if (pingroups[i].mux_reg == REG_N) {
819 mux = (pg_readl(TEGRA_PP_MUX_CTL(pingroups[i].mux_reg)) >>
832 if (pingroups[i].mux_reg == REG_N) {
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-tegra/
H A Dpinmux.c54 s8 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ member in struct:tegra_pingroup_desc
72 .mux_reg = REG_ ## mux_r, \
394 if (pingroups[pg].mux_reg == REG_N)
416 reg = pg_readl(TEGRA_PP_MUX_CTL(pingroups[pg].mux_reg));
419 pg_writel(reg, TEGRA_PP_MUX_CTL(pingroups[pg].mux_reg));
488 if (pingroups[pingroup].mux_reg != REG_N) {
815 if (pingroups[i].mux_reg == REG_N) {
819 mux = (pg_readl(TEGRA_PP_MUX_CTL(pingroups[i].mux_reg)) >>
832 if (pingroups[i].mux_reg == REG_N) {
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-spear3xx/
H A Dspear310.c139 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
H A Dspear300.c370 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
H A Dspear320.c384 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-spear3xx/
H A Dspear310.c139 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
H A Dspear300.c370 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
H A Dspear320.c384 .mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-davinci/include/mach/
H A Dmux.h25 const unsigned char mux_reg; member in struct:mux_config
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-davinci/include/mach/
H A Dmux.h25 const unsigned char mux_reg; member in struct:mux_config

Completed in 291 milliseconds