Searched refs:mstp_clks (Results 1 - 20 of 20) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7786.c93 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
148 .clk = &mstp_clks[MSTP029],
153 .clk = &mstp_clks[MSTP028],
158 .clk = &mstp_clks[MSTP027],
163 .clk = &mstp_clks[MSTP026],
168 .clk = &mstp_clks[MSTP025],
173 .clk = &mstp_clks[MSTP024],
175 CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]),
176 CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]),
177 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP02
[all...]
H A Dclock-sh7724.c167 static struct clk mstp_clks[HWBLK_NR] = { variable in typeref:struct:clk
249 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
250 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
251 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
252 CLKDEV_CON_ID("rs0", &mstp_clks[HWBLK_RSMEM]),
253 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
254 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
255 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
256 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
257 CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC
[all...]
H A Dclock-sh7366.c152 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
218 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
219 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
220 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
221 CLKDEV_CON_ID("rsmem0", &mstp_clks[MSTP028]),
222 CLKDEV_CON_ID("xymem0", &mstp_clks[MSTP026]),
223 CLKDEV_CON_ID("intc3", &mstp_clks[MSTP023]),
224 CLKDEV_CON_ID("intc0", &mstp_clks[MSTP022]),
225 CLKDEV_CON_ID("dmac0", &mstp_clks[MSTP021]),
226 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP02
[all...]
H A Dclock-sh7723.c150 static struct clk mstp_clks[] = { variable in typeref:struct:clk
227 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
228 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
229 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
230 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
231 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
232 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
233 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
234 CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
235 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWA
[all...]
H A Dclock-sh7722.c150 static struct clk mstp_clks[HWBLK_NR] = { variable in typeref:struct:clk
202 CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]),
203 CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]),
208 .clk = &mstp_clks[HWBLK_TMU],
213 .clk = &mstp_clks[HWBLK_TMU],
218 .clk = &mstp_clks[HWBLK_TMU],
220 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
221 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
222 CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
227 .clk = &mstp_clks[HWBLK_SCIF
[all...]
H A Dclock-sh7785.c92 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
141 .clk = &mstp_clks[MSTP029],
146 .clk = &mstp_clks[MSTP028],
151 .clk = &mstp_clks[MSTP027],
156 .clk = &mstp_clks[MSTP026],
161 .clk = &mstp_clks[MSTP025],
166 .clk = &mstp_clks[MSTP024],
168 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
169 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
170 CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP01
[all...]
H A Dclock-sh7343.c150 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
220 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
221 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
222 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
223 CLKDEV_CON_ID("uram0", &mstp_clks[MSTP028]),
224 CLKDEV_CON_ID("xymem0", &mstp_clks[MSTP026]),
225 CLKDEV_CON_ID("intc3", &mstp_clks[MSTP023]),
226 CLKDEV_CON_ID("intc0", &mstp_clks[MSTP022]),
227 CLKDEV_CON_ID("dmac0", &mstp_clks[MSTP021]),
228 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP02
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/kernel/cpu/sh4a/
H A Dclock-sh7786.c93 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
148 .clk = &mstp_clks[MSTP029],
153 .clk = &mstp_clks[MSTP028],
158 .clk = &mstp_clks[MSTP027],
163 .clk = &mstp_clks[MSTP026],
168 .clk = &mstp_clks[MSTP025],
173 .clk = &mstp_clks[MSTP024],
175 CLKDEV_CON_ID("ssi3_fck", &mstp_clks[MSTP023]),
176 CLKDEV_CON_ID("ssi2_fck", &mstp_clks[MSTP022]),
177 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP02
[all...]
H A Dclock-sh7724.c167 static struct clk mstp_clks[HWBLK_NR] = { variable in typeref:struct:clk
249 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
250 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
251 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
252 CLKDEV_CON_ID("rs0", &mstp_clks[HWBLK_RSMEM]),
253 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
254 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
255 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
256 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
257 CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC
[all...]
H A Dclock-sh7366.c152 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
218 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
219 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
220 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
221 CLKDEV_CON_ID("rsmem0", &mstp_clks[MSTP028]),
222 CLKDEV_CON_ID("xymem0", &mstp_clks[MSTP026]),
223 CLKDEV_CON_ID("intc3", &mstp_clks[MSTP023]),
224 CLKDEV_CON_ID("intc0", &mstp_clks[MSTP022]),
225 CLKDEV_CON_ID("dmac0", &mstp_clks[MSTP021]),
226 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP02
[all...]
H A Dclock-sh7723.c150 static struct clk mstp_clks[] = { variable in typeref:struct:clk
227 CLKDEV_CON_ID("tlb0", &mstp_clks[HWBLK_TLB]),
228 CLKDEV_CON_ID("ic0", &mstp_clks[HWBLK_IC]),
229 CLKDEV_CON_ID("oc0", &mstp_clks[HWBLK_OC]),
230 CLKDEV_CON_ID("l2c0", &mstp_clks[HWBLK_L2C]),
231 CLKDEV_CON_ID("ilmem0", &mstp_clks[HWBLK_ILMEM]),
232 CLKDEV_CON_ID("fpu0", &mstp_clks[HWBLK_FPU]),
233 CLKDEV_CON_ID("intc0", &mstp_clks[HWBLK_INTC]),
234 CLKDEV_CON_ID("dmac0", &mstp_clks[HWBLK_DMAC0]),
235 CLKDEV_CON_ID("sh0", &mstp_clks[HWBLK_SHYWA
[all...]
H A Dclock-sh7722.c150 static struct clk mstp_clks[HWBLK_NR] = { variable in typeref:struct:clk
202 CLKDEV_CON_ID("uram0", &mstp_clks[HWBLK_URAM]),
203 CLKDEV_CON_ID("xymem0", &mstp_clks[HWBLK_XYMEM]),
208 .clk = &mstp_clks[HWBLK_TMU],
213 .clk = &mstp_clks[HWBLK_TMU],
218 .clk = &mstp_clks[HWBLK_TMU],
220 CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]),
221 CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]),
222 CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]),
227 .clk = &mstp_clks[HWBLK_SCIF
[all...]
H A Dclock-sh7785.c92 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
141 .clk = &mstp_clks[MSTP029],
146 .clk = &mstp_clks[MSTP028],
151 .clk = &mstp_clks[MSTP027],
156 .clk = &mstp_clks[MSTP026],
161 .clk = &mstp_clks[MSTP025],
166 .clk = &mstp_clks[MSTP024],
168 CLKDEV_CON_ID("ssi1_fck", &mstp_clks[MSTP021]),
169 CLKDEV_CON_ID("ssi0_fck", &mstp_clks[MSTP020]),
170 CLKDEV_CON_ID("hac1_fck", &mstp_clks[MSTP01
[all...]
H A Dclock-sh7343.c150 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
220 CLKDEV_CON_ID("tlb0", &mstp_clks[MSTP031]),
221 CLKDEV_CON_ID("ic0", &mstp_clks[MSTP030]),
222 CLKDEV_CON_ID("oc0", &mstp_clks[MSTP029]),
223 CLKDEV_CON_ID("uram0", &mstp_clks[MSTP028]),
224 CLKDEV_CON_ID("xymem0", &mstp_clks[MSTP026]),
225 CLKDEV_CON_ID("intc3", &mstp_clks[MSTP023]),
226 CLKDEV_CON_ID("intc0", &mstp_clks[MSTP022]),
227 CLKDEV_CON_ID("dmac0", &mstp_clks[MSTP021]),
228 CLKDEV_CON_ID("sh0", &mstp_clks[MSTP02
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-shmobile/
H A Dclock-sh7367.c231 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
305 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[RTMSTP001]), /* IIC2 */
306 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[RTMSTP231]), /* VEU3 */
307 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[RTMSTP230]), /* VEU2 */
308 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[RTMSTP229]), /* VEU1 */
309 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[RTMSTP228]), /* VEU0 */
310 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[RTMSTP226]), /* VEU2H */
311 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[RTMSTP216]), /* IIC0 */
312 CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[RTMSTP206]), /* JPU */
313 CLKDEV_DEV_ID("sh-vou", &mstp_clks[RTMSTP20
[all...]
H A Dclock-sh7377.c242 static struct clk mstp_clks[] = { variable in typeref:struct:clk
318 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
319 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
320 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
321 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
322 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
323 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
324 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
325 CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
326 CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP22
[all...]
H A Dclock-sh7372.c409 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
497 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
498 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
499 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
500 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
501 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
502 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
503 CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
504 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
505 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP11
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-shmobile/
H A Dclock-sh7367.c231 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
305 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[RTMSTP001]), /* IIC2 */
306 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[RTMSTP231]), /* VEU3 */
307 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[RTMSTP230]), /* VEU2 */
308 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[RTMSTP229]), /* VEU1 */
309 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[RTMSTP228]), /* VEU0 */
310 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[RTMSTP226]), /* VEU2H */
311 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[RTMSTP216]), /* IIC0 */
312 CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[RTMSTP206]), /* JPU */
313 CLKDEV_DEV_ID("sh-vou", &mstp_clks[RTMSTP20
[all...]
H A Dclock-sh7377.c242 static struct clk mstp_clks[] = { variable in typeref:struct:clk
318 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
319 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
320 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
321 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
322 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
323 CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* IIC0 */
324 CLKDEV_DEV_ID("uio_pdrv_genirq.5", &mstp_clks[MSTP106]), /* JPU */
325 CLKDEV_DEV_ID("uio_pdrv_genirq.0", &mstp_clks[MSTP101]), /* VPU */
326 CLKDEV_DEV_ID("uio_pdrv_genirq.6", &mstp_clks[MSTP22
[all...]
H A Dclock-sh7372.c409 static struct clk mstp_clks[MSTP_NR] = { variable in typeref:struct:clk
497 CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* IIC2 */
498 CLKDEV_DEV_ID("uio_pdrv_genirq.4", &mstp_clks[MSTP131]), /* VEU3 */
499 CLKDEV_DEV_ID("uio_pdrv_genirq.3", &mstp_clks[MSTP130]), /* VEU2 */
500 CLKDEV_DEV_ID("uio_pdrv_genirq.2", &mstp_clks[MSTP129]), /* VEU1 */
501 CLKDEV_DEV_ID("uio_pdrv_genirq.1", &mstp_clks[MSTP128]), /* VEU0 */
502 CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[MSTP127]), /* CEU */
503 CLKDEV_DEV_ID("sh-mobile-csi2.0", &mstp_clks[MSTP126]), /* CSI2 */
504 CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
505 CLKDEV_DEV_ID("sh_mobile_lcdc_fb.1", &mstp_clks[MSTP11
[all...]

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