Searched refs:l2x0_base (Results 1 - 12 of 12) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-brcm/
H A Dcache-l310.c36 static void __iomem *l2x0_base; variable
91 void __iomem *base = l2x0_base;
97 void __iomem *base = l2x0_base;
120 void __iomem *base = l2x0_base;
133 void __iomem *base = l2x0_base;
149 void __iomem *base = l2x0_base;
164 reg = readl_relaxed(l2x0_base + L2X0_RAW_INTR_STAT);
166 writel_relaxed(reg, l2x0_base + L2X0_INTR_CLEAR);
178 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT1_VAL);
180 val = readl_relaxed(l2x0_base
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-brcm/
H A Dcache-l310.c36 static void __iomem *l2x0_base; variable
91 void __iomem *base = l2x0_base;
97 void __iomem *base = l2x0_base;
120 void __iomem *base = l2x0_base;
133 void __iomem *base = l2x0_base;
149 void __iomem *base = l2x0_base;
164 reg = readl_relaxed(l2x0_base + L2X0_RAW_INTR_STAT);
166 writel_relaxed(reg, l2x0_base + L2X0_INTR_CLEAR);
178 val = readl_relaxed(l2x0_base + L2X0_EVENT_CNT1_VAL);
180 val = readl_relaxed(l2x0_base
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mm/
H A Dcache-l2x0.c28 static void __iomem *l2x0_base; variable
41 void __iomem *base = l2x0_base;
48 void __iomem *base = l2x0_base;
55 void __iomem *base = l2x0_base;
74 void __iomem *base = l2x0_base;
91 void __iomem *base = l2x0_base;
112 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
113 cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
120 void __iomem *base = l2x0_base;
159 void __iomem *base = l2x0_base;
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mm/
H A Dcache-l2x0.c28 static void __iomem *l2x0_base; variable
41 void __iomem *base = l2x0_base;
48 void __iomem *base = l2x0_base;
55 void __iomem *base = l2x0_base;
74 void __iomem *base = l2x0_base;
91 void __iomem *base = l2x0_base;
112 writel_relaxed(l2x0_way_mask, l2x0_base + L2X0_INV_WAY);
113 cache_wait(l2x0_base + L2X0_INV_WAY, l2x0_way_mask);
120 void __iomem *base = l2x0_base;
159 void __iomem *base = l2x0_base;
[all...]
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mx3/
H A Dmm.c112 void __iomem *l2x0_base; local
114 l2x0_base = ioremap(L2CC_BASE_ADDR, 4096);
115 if (IS_ERR(l2x0_base)) {
117 PTR_ERR(l2x0_base));
121 l2x0_init(l2x0_base, 0x00030024, 0x00000000);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mx3/
H A Dmm.c112 void __iomem *l2x0_base; local
114 l2x0_base = ioremap(L2CC_BASE_ADDR, 4096);
115 if (IS_ERR(l2x0_base)) {
117 PTR_ERR(l2x0_base));
121 l2x0_init(l2x0_base, 0x00030024, 0x00000000);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ux500/
H A Dcpu.c76 void __iomem *l2x0_base; local
78 l2x0_base = __io_address(UX500_L2CC_BASE);
81 l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ux500/
H A Dcpu.c76 void __iomem *l2x0_base; local
78 l2x0_base = __io_address(UX500_L2CC_BASE);
81 l2x0_init(l2x0_base, 0x3e060000, 0xc0000fff);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-vexpress/
H A Dct-ca9x4.c216 void __iomem *l2x0_base = MMIO_P2V(CT_CA9X4_L2CC); local
219 writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
220 writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
222 l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-vexpress/
H A Dct-ca9x4.c216 void __iomem *l2x0_base = MMIO_P2V(CT_CA9X4_L2CC); local
219 writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
220 writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
222 l2x0_init(l2x0_base, 0x00400000, 0xfe0fffff);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-realview/
H A Drealview_pbx.c386 void __iomem *l2x0_base = local
390 writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
391 writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
395 l2x0_init(l2x0_base, 0x02520000, 0xc0000fff);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-realview/
H A Drealview_pbx.c386 void __iomem *l2x0_base = local
390 writel(0, l2x0_base + L2X0_TAG_LATENCY_CTRL);
391 writel(0, l2x0_base + L2X0_DATA_LATENCY_CTRL);
395 l2x0_init(l2x0_base, 0x02520000, 0xc0000fff);

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