Searched refs:hclk_divisors (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ep93xx/
H A Dclock.c480 static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; variable
530 clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7];
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ep93xx/
H A Dclock.c480 static char hclk_divisors[] = { 1, 2, 4, 5, 6, 8, 16, 32 }; variable
530 clk_h.rate = clk_pll1.rate / hclk_divisors[(value >> 20) & 0x7];

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