Searched refs:h_bpsw (Results 1 - 25 of 39) sorted by relevance

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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/m32r/
H A Dcpu.c131 return CPU (h_bpsw);
139 CPU (h_bpsw) = newval;
H A Dcpu2.c147 return CPU (h_bpsw);
155 CPU (h_bpsw) = newval;
H A Dcpux.c147 return CPU (h_bpsw);
155 CPU (h_bpsw) = newval;
H A Dm32r2.c53 return (((CPU (h_bpsw) & 0xc1) << 8)
91 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dm32rx.c53 return (((CPU (h_bpsw) & 0xc1) << 8)
91 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dm32r.c134 return (((CPU (h_bpsw) & 0xc1) << 8)
172 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dcpu.h72 UQI h_bpsw; member in struct:__anon3917::__anon3918
73 #define GET_H_BPSW() CPU (h_bpsw)
74 #define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
H A Dcpu2.h79 UQI h_bpsw; member in struct:__anon3943::__anon3944
80 #define GET_H_BPSW() CPU (h_bpsw)
81 #define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
H A Dcpux.h79 UQI h_bpsw; member in struct:__anon4045::__anon4046
80 #define GET_H_BPSW() CPU (h_bpsw)
81 #define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/m32r/
H A Dcpu.c131 return CPU (h_bpsw);
139 CPU (h_bpsw) = newval;
H A Dcpu2.c147 return CPU (h_bpsw);
155 CPU (h_bpsw) = newval;
H A Dcpux.c147 return CPU (h_bpsw);
155 CPU (h_bpsw) = newval;
H A Dm32r2.c53 return (((CPU (h_bpsw) & 0xc1) << 8)
91 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dm32rx.c53 return (((CPU (h_bpsw) & 0xc1) << 8)
91 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dm32r.c134 return (((CPU (h_bpsw) & 0xc1) << 8)
172 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dcpu.h72 UQI h_bpsw; member in struct:__anon3012::__anon3013
73 #define GET_H_BPSW() CPU (h_bpsw)
74 #define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
H A Dcpu2.h79 UQI h_bpsw; member in struct:__anon3038::__anon3039
80 #define GET_H_BPSW() CPU (h_bpsw)
81 #define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
H A Dcpux.h79 UQI h_bpsw; member in struct:__anon3140::__anon3141
80 #define GET_H_BPSW() CPU (h_bpsw)
81 #define SET_H_BPSW(x) (CPU (h_bpsw) = (x))
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/m32r/
H A Dcpu.c131 return CPU (h_bpsw);
139 CPU (h_bpsw) = newval;
H A Dcpu2.c147 return CPU (h_bpsw);
155 CPU (h_bpsw) = newval;
H A Dcpux.c147 return CPU (h_bpsw);
155 CPU (h_bpsw) = newval;
H A Dm32r2.c53 return (((CPU (h_bpsw) & 0xc1) << 8)
91 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dm32rx.c53 return (((CPU (h_bpsw) & 0xc1) << 8)
91 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dm32r.c134 return (((CPU (h_bpsw) & 0xc1) << 8)
172 CPU (h_bpsw) = (newval >> 8) & 0xff;
H A Dcpu.h72 UQI h_bpsw; member in struct:__anon37942::__anon37943
73 #define GET_H_BPSW() CPU (h_bpsw)
74 #define SET_H_BPSW(x) (CPU (h_bpsw) = (x))

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