Searched refs:f_low (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/ata/
H A Dpata_hpt3x2n.c452 unsigned int f_low, f_high; local
517 f_low = (pci_mhz * 48) / 66; /* PCI Mhz for 66Mhz DPLL */
518 f_high = f_low + 2; /* Tolerance */
520 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
528 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
H A Dpata_hpt37x.c931 unsigned int f_low, f_high; local
937 f_low = (MHz[clock_slot] * 48) / MHz[dpll];
938 f_high = f_low + 2;
944 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
951 f_low -= adjust >> 1;
954 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/ata/
H A Dpata_hpt3x2n.c452 unsigned int f_low, f_high; local
517 f_low = (pci_mhz * 48) / 66; /* PCI Mhz for 66Mhz DPLL */
518 f_high = f_low + 2; /* Tolerance */
520 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
528 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low);
H A Dpata_hpt37x.c931 unsigned int f_low, f_high; local
937 f_low = (MHz[clock_slot] * 48) / MHz[dpll];
938 f_high = f_low + 2;
944 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
951 f_low -= adjust >> 1;
954 pci_write_config_dword(dev, 0x5C, (f_high << 16) | f_low | 0x100);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/ide/
H A Dhpt366.c732 static int hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f_high) argument
734 u32 dpll = (f_high << 16) | f_low | 0x100;
944 u16 f_low, delta = pci_clk < 50 ? 2 : 4; local
972 f_low = (pci_clk * 48) / dpll_clk;
975 if(hpt37x_calibrate_dpll(dev, f_low, f_low + delta))
982 f_low -= adjust >> 1;
984 f_low += adjust >> 1;
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/ide/
H A Dhpt366.c732 static int hpt37x_calibrate_dpll(struct pci_dev *dev, u16 f_low, u16 f_high) argument
734 u32 dpll = (f_high << 16) | f_low | 0x100;
944 u16 f_low, delta = pci_clk < 50 ? 2 : 4; local
972 f_low = (pci_clk * 48) / dpll_clk;
975 if(hpt37x_calibrate_dpll(dev, f_low, f_low + delta))
982 f_low -= adjust >> 1;
984 f_low += adjust >> 1;

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