Searched refs:enable_reg1 (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-pnx4008/
H A Dclock.h28 u32 enable_reg1; member in struct:clk
H A Dclock.c77 if (clk->enable_reg1)
78 __raw_writel(__raw_readl(clk->enable_reg1) &
79 ~(1 << clk->enable_shift1), clk->enable_reg1);
84 if (clk->enable_reg1)
85 __raw_writel(__raw_readl(clk->enable_reg1) |
86 (1 << clk->enable_shift1), clk->enable_reg1);
479 .enable_reg1 = USBCTRL_REG,
493 .enable_reg1 = DSPCLKCTRL_REG,
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-pnx4008/
H A Dclock.h28 u32 enable_reg1; member in struct:clk
H A Dclock.c77 if (clk->enable_reg1)
78 __raw_writel(__raw_readl(clk->enable_reg1) &
79 ~(1 << clk->enable_shift1), clk->enable_reg1);
84 if (clk->enable_reg1)
85 __raw_writel(__raw_readl(clk->enable_reg1) |
86 (1 << clk->enable_shift1), clk->enable_reg1);
479 .enable_reg1 = USBCTRL_REG,
493 .enable_reg1 = DSPCLKCTRL_REG,

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