Searched refs:dw_dmmu_base (Results 1 - 10 of 10) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/tidspbridge/core/
H A Due_deh.c62 hw_mmu_event_status(resources->dw_dmmu_base, &event);
64 hw_mmu_fault_addr_read(resources->dw_dmmu_base, &fault_addr);
76 hw_mmu_event_disable(resources->dw_dmmu_base,
79 hw_mmu_event_disable(resources->dw_dmmu_base,
188 hw_mmu_twl_disable(resources->dw_dmmu_base);
189 hw_mmu_tlb_flush_all(resources->dw_dmmu_base);
191 hw_mmu_tlb_add(resources->dw_dmmu_base,
201 hw_mmu_event_ack(resources->dw_dmmu_base,
206 hw_mmu_disable(resources->dw_dmmu_base);
H A Dtiomap3430.c440 hw_mmu_disable(resources->dw_dmmu_base);
442 hw_mmu_twl_disable(resources->dw_dmmu_base);
478 hw_mmu_num_locked_set(resources->dw_dmmu_base, itmp_entry_ndx);
479 hw_mmu_victim_num_set(resources->dw_dmmu_base, itmp_entry_ndx);
480 hw_mmu_ttb_set(resources->dw_dmmu_base,
482 hw_mmu_twl_enable(resources->dw_dmmu_base);
485 temp = __raw_readl((resources->dw_dmmu_base) + 0x10);
487 __raw_writel(temp, (resources->dw_dmmu_base) + 0x10);
490 hw_mmu_enable(resources->dw_dmmu_base);
576 hw_mmu_event_enable(resources->dw_dmmu_base,
[all...]
H A Dtiomap_io.c439 temp = readl(resources->dw_dmmu_base + 0x10);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/tidspbridge/core/
H A Due_deh.c62 hw_mmu_event_status(resources->dw_dmmu_base, &event);
64 hw_mmu_fault_addr_read(resources->dw_dmmu_base, &fault_addr);
76 hw_mmu_event_disable(resources->dw_dmmu_base,
79 hw_mmu_event_disable(resources->dw_dmmu_base,
188 hw_mmu_twl_disable(resources->dw_dmmu_base);
189 hw_mmu_tlb_flush_all(resources->dw_dmmu_base);
191 hw_mmu_tlb_add(resources->dw_dmmu_base,
201 hw_mmu_event_ack(resources->dw_dmmu_base,
206 hw_mmu_disable(resources->dw_dmmu_base);
H A Dtiomap3430.c440 hw_mmu_disable(resources->dw_dmmu_base);
442 hw_mmu_twl_disable(resources->dw_dmmu_base);
478 hw_mmu_num_locked_set(resources->dw_dmmu_base, itmp_entry_ndx);
479 hw_mmu_victim_num_set(resources->dw_dmmu_base, itmp_entry_ndx);
480 hw_mmu_ttb_set(resources->dw_dmmu_base,
482 hw_mmu_twl_enable(resources->dw_dmmu_base);
485 temp = __raw_readl((resources->dw_dmmu_base) + 0x10);
487 __raw_writel(temp, (resources->dw_dmmu_base) + 0x10);
490 hw_mmu_enable(resources->dw_dmmu_base);
576 hw_mmu_event_enable(resources->dw_dmmu_base,
[all...]
H A Dtiomap_io.c439 temp = readl(resources->dw_dmmu_base + 0x10);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/tidspbridge/include/dspbridge/
H A Dcfgdefs.h71 void __iomem *dw_dmmu_base; member in struct:cfg_hostres
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/tidspbridge/include/dspbridge/
H A Dcfgdefs.h71 void __iomem *dw_dmmu_base; member in struct:cfg_hostres
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/tidspbridge/rmgr/
H A Ddrv.c713 dev_dbg(bridge, "dw_dmmu_base %p\n", host_res->dw_dmmu_base);
767 host_res->dw_dmmu_base = ioremap(OMAP_DMMU_BASE,
780 dev_dbg(bridge, "dw_dmmu_base %p\n", host_res->dw_dmmu_base);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/tidspbridge/rmgr/
H A Ddrv.c713 dev_dbg(bridge, "dw_dmmu_base %p\n", host_res->dw_dmmu_base);
767 host_res->dw_dmmu_base = ioremap(OMAP_DMMU_BASE,
780 dev_dbg(bridge, "dw_dmmu_base %p\n", host_res->dw_dmmu_base);

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