Searched refs:clk_rst (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-mmp/
H A Dclock.c21 uint32_t clk_rst; local
23 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel);
24 __raw_writel(clk_rst, clk->clk_rst);
29 __raw_writel(0, clk->clk_rst);
39 __raw_writel(clk->enable_val, clk->clk_rst);
44 __raw_writel(0, clk->clk_rst);
H A Dclock.h20 void __iomem *clk_rst; /* clock reset control register */ member in struct:clk
32 .clk_rst = (void __iomem *)APBC_##_reg, \
40 .clk_rst = (void __iomem *)APBC_##_reg, \
48 .clk_rst = (void __iomem *)APMU_##_reg, \
56 .clk_rst = (void __iomem *)APMU_##_reg, \
H A Dmmp2.c165 unsigned long clk_rst; local
173 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
174 __raw_writel(clk_rst, APBC_MMP2_TIMERS);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-mmp/
H A Dclock.c21 uint32_t clk_rst; local
23 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(clk->fnclksel);
24 __raw_writel(clk_rst, clk->clk_rst);
29 __raw_writel(0, clk->clk_rst);
39 __raw_writel(clk->enable_val, clk->clk_rst);
44 __raw_writel(0, clk->clk_rst);
H A Dclock.h20 void __iomem *clk_rst; /* clock reset control register */ member in struct:clk
32 .clk_rst = (void __iomem *)APBC_##_reg, \
40 .clk_rst = (void __iomem *)APBC_##_reg, \
48 .clk_rst = (void __iomem *)APMU_##_reg, \
56 .clk_rst = (void __iomem *)APMU_##_reg, \
H A Dmmp2.c165 unsigned long clk_rst; local
173 clk_rst = APBC_APBCLK | APBC_FNCLK | APBC_FNCLKSEL(1);
174 __raw_writel(clk_rst, APBC_MMP2_TIMERS);

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