Searched refs:cfg_lo (Results 1 - 10 of 10) sorted by relevance
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/include/linux/ |
| H A D | dw_dmac.h | 46 * @cfg_lo: Platform-specific initializer for the CFG_LO register
54 u32 cfg_lo; member in struct:dw_dma_slave
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/include/linux/ |
| H A D | dw_dmac.h | 46 * @cfg_lo: Platform-specific initializer for the CFG_LO register
54 u32 cfg_lo; member in struct:dw_dma_slave
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/dma/ |
| H A D | intel_mid_dma.c | 261 iowrite32(first->cfg_lo, midc->ch_regs + CFG_LOW);
266 first->cfg_lo, first->ctl_hi, first->ctl_lo);
496 union intel_mid_dma_cfg_lo cfg_lo; local
518 cfg_lo.cfg_lo = 0;
519 cfg_lo.cfgx.hs_sel_dst = 1;
520 cfg_lo.cfgx.hs_sel_src = 1;
522 cfg_lo.cfg_lo = 0x00000;
585 ctl_lo.ctl_lo, ctl_hi.ctl_hi, cfg_lo
[all...] |
| H A D | intel_mid_dma_regs.h | 139 u32 cfg_lo; member in union:intel_mid_dma_cfg_lo
238 u32 cfg_lo; member in struct:intel_mid_dma_desc
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| H A D | dw_dmac.c | 892 cfglo = dws->cfg_lo;
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/dma/ |
| H A D | intel_mid_dma.c | 261 iowrite32(first->cfg_lo, midc->ch_regs + CFG_LOW);
266 first->cfg_lo, first->ctl_hi, first->ctl_lo);
496 union intel_mid_dma_cfg_lo cfg_lo; local
518 cfg_lo.cfg_lo = 0;
519 cfg_lo.cfgx.hs_sel_dst = 1;
520 cfg_lo.cfgx.hs_sel_src = 1;
522 cfg_lo.cfg_lo = 0x00000;
585 ctl_lo.ctl_lo, ctl_hi.ctl_hi, cfg_lo
[all...] |
| H A D | intel_mid_dma_regs.h | 139 u32 cfg_lo; member in union:intel_mid_dma_cfg_lo
238 u32 cfg_lo; member in struct:intel_mid_dma_desc
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| H A D | dw_dmac.c | 892 cfglo = dws->cfg_lo;
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/avr32/mach-at32ap/ |
| H A D | at32ap700x.c | 1356 slave->sdata.cfg_lo &= ~(DWC_CFGL_HS_DST_POL
2050 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2058 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2130 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/avr32/mach-at32ap/ |
| H A D | at32ap700x.c | 1356 slave->sdata.cfg_lo &= ~(DWC_CFGL_HS_DST_POL
2050 rx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2058 tx_dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
2130 dws->cfg_lo &= ~(DWC_CFGL_HS_DST_POL | DWC_CFGL_HS_SRC_POL);
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Completed in 199 milliseconds