Searched refs:bRFRegOffsetMask (Results 1 - 8 of 8) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/drivers/staging/rtl8192su/ |
H A D | r8192S_rtl6052.c | 603 RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); 619 reg = rtl8192_phy_QueryRFReg(dev, eRFPath, Offset, bRFRegOffsetMask); 642 rtl8192_phy_SetRFReg(dev, eRFPath, Offset, bRFRegOffsetMask, RF_Shadow[eRFPath][Offset].Value);
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H A D | r8192S_phy.c | 533 if (BitMask != bRFRegOffsetMask) // RF data is 12 bits only 1026 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioA_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]); 1048 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioB_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]); 1120 rtl8192_phy_SetRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]);
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H A D | r8192S_phyreg.h | 990 #define bRFRegOffsetMask 0xfffff macro
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H A D | r8192U_dm.c | 1553 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d); 1554 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f); 1555 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d); 1556 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f);
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/drivers/staging/rtl8192su/ |
H A D | r8192S_rtl6052.c | 603 RF_Shadow[eRFPath][Offset].Value = (Data & bRFRegOffsetMask); 619 reg = rtl8192_phy_QueryRFReg(dev, eRFPath, Offset, bRFRegOffsetMask); 642 rtl8192_phy_SetRFReg(dev, eRFPath, Offset, bRFRegOffsetMask, RF_Shadow[eRFPath][Offset].Value);
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H A D | r8192S_phy.c | 533 if (BitMask != bRFRegOffsetMask) // RF data is 12 bits only 1026 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioA_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioA_Array_Table[i+1]); 1048 rtl8192_phy_SetRFReg(dev, eRFPath, Rtl819XRadioB_Array_Table[i], bRFRegOffsetMask, Rtl819XRadioB_Array_Table[i+1]); 1120 rtl8192_phy_SetRFReg(dev, eRFPath, WriteAddr[HW90_BLOCK_RF], bRFRegOffsetMask, WriteData[i]);
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H A D | r8192S_phyreg.h | 990 #define bRFRegOffsetMask 0xfffff macro
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H A D | r8192U_dm.c | 1553 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d); 1554 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f); 1555 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4d); 1556 rtl8192_phy_SetRFReg(dev, RF90_PATH_A, 0x02, bRFRegOffsetMask, 0x4f);
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