/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/mips/include/asm/sibyte/ |
H A D | bcm1480_l2c.h | 43 #define M_BCM1480_L2C_MGMT_INDEX _SB_MAKEMASK(12, S_BCM1480_L2C_MGMT_INDEX) 48 #define M_BCM1480_L2C_MGMT_WAY _SB_MAKEMASK(3, S_BCM1480_L2C_MGMT_WAY) 56 #define M_BCM1480_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2, S_BCM1480_L2C_MGMT_ECC_DIAG) 71 #define M_BCM1480_L2C_TAG_MBZ _SB_MAKEMASK(5, S_BCM1480_L2C_TAG_MBZ) 74 #define M_BCM1480_L2C_TAG_INDEX _SB_MAKEMASK(12, S_BCM1480_L2C_TAG_INDEX) 80 #define M_BCM1480_L2C_TAG_TAG _SB_MAKEMASK(23, S_BCM1480_L2C_TAG_TAG) 85 #define M_BCM1480_L2C_TAG_ECC _SB_MAKEMASK(6, S_BCM1480_L2C_TAG_ECC) 90 #define M_BCM1480_L2C_TAG_WAY _SB_MAKEMASK(3, S_BCM1480_L2C_TAG_WAY) 98 #define M_BCM1480_L2C_DATA_ECC _SB_MAKEMASK(10, S_BCM1480_L2C_DATA_ECC) 108 #define M_BCM1480_L2C_MISC0_WAY_REMOTE _SB_MAKEMASK( [all...] |
H A D | sb1250_l2c.h | 43 #define M_L2C_TAG_MBZ _SB_MAKEMASK(5, S_L2C_TAG_MBZ) 46 #define M_L2C_TAG_INDEX _SB_MAKEMASK(12, S_L2C_TAG_INDEX) 51 #define M_L2C_TAG_TAG _SB_MAKEMASK(23, S_L2C_TAG_TAG) 56 #define M_L2C_TAG_ECC _SB_MAKEMASK(6, S_L2C_TAG_ECC) 61 #define M_L2C_TAG_WAY _SB_MAKEMASK(2, S_L2C_TAG_WAY) 73 #define M_L2C_MGMT_INDEX _SB_MAKEMASK(12, S_L2C_MGMT_INDEX) 78 #define M_L2C_MGMT_QUADRANT _SB_MAKEMASK(2, S_L2C_MGMT_QUADRANT) 83 #define M_L2C_MGMT_HALF _SB_MAKEMASK(1, S_L2C_MGMT_HALF) 86 #define M_L2C_MGMT_WAY _SB_MAKEMASK(2, S_L2C_MGMT_WAY) 91 #define M_L2C_MGMT_ECC_DIAG _SB_MAKEMASK( [all...] |
H A D | sb1250_uart.h | 49 #define M_DUART_BITS_PER_CHAR _SB_MAKEMASK(2, S_DUART_BITS_PER_CHAR) 67 #define M_DUART_PARITY_MODE _SB_MAKEMASK(2, S_DUART_PARITY_MODE) 92 #define M_DUART_MODE_RESERVED1 _SB_MAKEMASK(3, 0) /* ignored */ 103 #define M_DUART_CHAN_MODE _SB_MAKEMASK(2, S_DUART_CHAN_MODE) 126 #define M_DUART_MISC_CMD _SB_MAKEMASK(3, S_DUART_MISC_CMD) 171 #define M_DUART_CLK_COUNTER _SB_MAKEMASK(12, 0) 182 #define M_DUART_RX_DATA _SB_MAKEMASK(8, 0) 183 #define M_DUART_TX_DATA _SB_MAKEMASK(8, 0) 205 #define M_DUART_IN_PIN_VAL _SB_MAKEMASK(4, S_DUART_IN_PIN_VAL) 208 #define M_DUART_IN_PIN_CHNG _SB_MAKEMASK( [all...] |
H A D | sb1250_mc.h | 43 #define M_MC_RESERVED0 _SB_MAKEMASK(8, S_MC_RESERVED0) 46 #define M_MC_CHANNEL_SEL _SB_MAKEMASK(8, S_MC_CHANNEL_SEL) 51 #define M_MC_BANK0_MAP _SB_MAKEMASK(4, S_MC_BANK0_MAP) 59 #define M_MC_BANK1_MAP _SB_MAKEMASK(4, S_MC_BANK1_MAP) 67 #define M_MC_BANK2_MAP _SB_MAKEMASK(4, S_MC_BANK2_MAP) 75 #define M_MC_BANK3_MAP _SB_MAKEMASK(4, S_MC_BANK3_MAP) 82 #define M_MC_RESERVED1 _SB_MAKEMASK(8, 32) 85 #define M_MC_QUEUE_SIZE _SB_MAKEMASK(4, S_MC_QUEUE_SIZE) 91 #define M_MC_AGE_LIMIT _SB_MAKEMASK(4, S_MC_AGE_LIMIT) 97 #define M_MC_WR_LIMIT _SB_MAKEMASK( [all...] |
H A D | sb1250_scd.h | 45 #define M_SYS_RESERVED _SB_MAKEMASK(8, 0) 48 #define M_SYS_REVISION _SB_MAKEMASK(8, S_SYS_REVISION) 96 #define M_SYS_L2C_SIZE _SB_MAKEMASK(4, S_SYS_L2C_SIZE) 112 #define M_SYS_NUM_CPUS _SB_MAKEMASK(4, S_SYS_NUM_CPUS) 118 #define M_SYS_PART _SB_MAKEMASK(16, S_SYS_PART) 131 #define M_SYS_SOC_TYPE _SB_MAKEMASK(4, S_SYS_SOC_TYPE) 170 #define M_SYS_WID _SB_MAKEMASK(32, S_SYS_WID) 182 #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32, S_SYS_WAFERID1_200) 187 #define M_SYS_BIN _SB_MAKEMASK(4, S_SYS_BIN) 193 #define M_SYS_WAFERID2_200 _SB_MAKEMASK( [all...] |
H A D | sb1250_genbus.h | 50 #define M_IO_WIDTH_SEL _SB_MAKEMASK(2, S_IO_WIDTH_SEL) 74 #define M_IO_TIMEOUT _SB_MAKEMASK(8, S_IO_TIMEOUT) 83 #define M_IO_MULT_SIZE _SB_MAKEMASK(12, S_IO_MULT_SIZE) 94 #define M_IO_START_ADDR _SB_MAKEMASK(14, S_IO_START_ADDR) 108 #define M_IO_ALE_WIDTH _SB_MAKEMASK(3, S_IO_ALE_WIDTH) 118 #define M_IO_ALE_TO_CS _SB_MAKEMASK(2, S_IO_ALE_TO_CS) 125 #define M_IO_BURST_WIDTH _SB_MAKEMASK(2, S_IO_BURST_WIDTH) 131 #define M_IO_CS_WIDTH _SB_MAKEMASK(5, S_IO_CS_WIDTH) 136 #define M_IO_RDY_SMPLE _SB_MAKEMASK(3, S_IO_RDY_SMPLE) 146 #define M_IO_ALE_TO_WRITE _SB_MAKEMASK( [all...] |
H A D | bcm1480_mc.h | 43 #define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV0) 49 #define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV1) 55 #define M_BCM1480_MC_INTLV2 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV2) 61 #define M_BCM1480_MC_CS_MODE _SB_MAKEMASK(8, S_BCM1480_MC_CS_MODE) 84 #define M_BCM1480_MC_CS0_START _SB_MAKEMASK(12, S_BCM1480_MC_CS0_START) 89 #define M_BCM1480_MC_CS1_START _SB_MAKEMASK(12, S_BCM1480_MC_CS1_START) 94 #define M_BCM1480_MC_CS2_START _SB_MAKEMASK(12, S_BCM1480_MC_CS2_START) 99 #define M_BCM1480_MC_CS3_START _SB_MAKEMASK(12, S_BCM1480_MC_CS3_START) 108 #define M_BCM1480_MC_CS0_END _SB_MAKEMASK(12, S_BCM1480_MC_CS0_END) 113 #define M_BCM1480_MC_CS1_END _SB_MAKEMASK(1 [all...] |
H A D | sb1250_dma.h | 60 #define M_DMA_DESC_TYPE _SB_MAKEMASK(2, S_DMA_DESC_TYPE) 80 #define M_DMA_INT_PKTCNT _SB_MAKEMASK(8, S_DMA_INT_PKTCNT) 85 #define M_DMA_RINGSZ _SB_MAKEMASK(16, S_DMA_RINGSZ) 90 #define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16, S_DMA_HIGH_WATERMARK) 95 #define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16, S_DMA_LOW_WATERMARK) 121 #define M_DMA_MBZ1 _SB_MAKEMASK(6, 15) 124 #define M_DMA_HDR_SIZE _SB_MAKEMASK(9, S_DMA_HDR_SIZE) 128 #define M_DMA_MBZ2 _SB_MAKEMASK(5, 32) 131 #define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9, S_DMA_ASICXFR_SIZE) 136 #define M_DMA_INT_TIMEOUT _SB_MAKEMASK(1 [all...] |
H A D | bcm1480_scd.h | 102 #define M_BCM1480_SYS_PLL_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_PLL_DIV) 107 #define M_BCM1480_SYS_SW_DIV _SB_MAKEMASK(5, S_BCM1480_SYS_SW_DIV) 115 #define M_BCM1480_SYS_BOOT_MODE _SB_MAKEMASK(2, S_BCM1480_SYS_BOOT_MODE) 132 #define M_BCM1480_SYS_CONFIG _SB_MAKEMASK(6, S_BCM1480_SYS_CONFIG) 136 #define M_BCM1480_SYS_RESERVED32 _SB_MAKEMASK(32, 15) 139 #define M_BCM1480_SYS_NODEID _SB_MAKEMASK(4, S_BCM1480_SYS_NODEID) 199 #define M_BCM1480_SCD_WDOG_RESET_TYPE _SB_MAKEMASK(5, S_BCM1480_SCD_WDOG_RESET_TYPE) 247 #define M_SPC_CFG_SRC4 _SB_MAKEMASK(8, S_SPC_CFG_SRC4) 252 #define M_SPC_CFG_SRC5 _SB_MAKEMASK(8, S_SPC_CFG_SRC5) 257 #define M_SPC_CFG_SRC6 _SB_MAKEMASK( [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/mips/include/asm/sibyte/ |
H A D | bcm1480_l2c.h | 43 #define M_BCM1480_L2C_MGMT_INDEX _SB_MAKEMASK(12, S_BCM1480_L2C_MGMT_INDEX) 48 #define M_BCM1480_L2C_MGMT_WAY _SB_MAKEMASK(3, S_BCM1480_L2C_MGMT_WAY) 56 #define M_BCM1480_L2C_MGMT_ECC_DIAG _SB_MAKEMASK(2, S_BCM1480_L2C_MGMT_ECC_DIAG) 71 #define M_BCM1480_L2C_TAG_MBZ _SB_MAKEMASK(5, S_BCM1480_L2C_TAG_MBZ) 74 #define M_BCM1480_L2C_TAG_INDEX _SB_MAKEMASK(12, S_BCM1480_L2C_TAG_INDEX) 80 #define M_BCM1480_L2C_TAG_TAG _SB_MAKEMASK(23, S_BCM1480_L2C_TAG_TAG) 85 #define M_BCM1480_L2C_TAG_ECC _SB_MAKEMASK(6, S_BCM1480_L2C_TAG_ECC) 90 #define M_BCM1480_L2C_TAG_WAY _SB_MAKEMASK(3, S_BCM1480_L2C_TAG_WAY) 98 #define M_BCM1480_L2C_DATA_ECC _SB_MAKEMASK(10, S_BCM1480_L2C_DATA_ECC) 108 #define M_BCM1480_L2C_MISC0_WAY_REMOTE _SB_MAKEMASK( [all...] |
H A D | sb1250_l2c.h | 43 #define M_L2C_TAG_MBZ _SB_MAKEMASK(5, S_L2C_TAG_MBZ) 46 #define M_L2C_TAG_INDEX _SB_MAKEMASK(12, S_L2C_TAG_INDEX) 51 #define M_L2C_TAG_TAG _SB_MAKEMASK(23, S_L2C_TAG_TAG) 56 #define M_L2C_TAG_ECC _SB_MAKEMASK(6, S_L2C_TAG_ECC) 61 #define M_L2C_TAG_WAY _SB_MAKEMASK(2, S_L2C_TAG_WAY) 73 #define M_L2C_MGMT_INDEX _SB_MAKEMASK(12, S_L2C_MGMT_INDEX) 78 #define M_L2C_MGMT_QUADRANT _SB_MAKEMASK(2, S_L2C_MGMT_QUADRANT) 83 #define M_L2C_MGMT_HALF _SB_MAKEMASK(1, S_L2C_MGMT_HALF) 86 #define M_L2C_MGMT_WAY _SB_MAKEMASK(2, S_L2C_MGMT_WAY) 91 #define M_L2C_MGMT_ECC_DIAG _SB_MAKEMASK( [all...] |
H A D | sb1250_uart.h | 49 #define M_DUART_BITS_PER_CHAR _SB_MAKEMASK(2, S_DUART_BITS_PER_CHAR) 67 #define M_DUART_PARITY_MODE _SB_MAKEMASK(2, S_DUART_PARITY_MODE) 92 #define M_DUART_MODE_RESERVED1 _SB_MAKEMASK(3, 0) /* ignored */ 103 #define M_DUART_CHAN_MODE _SB_MAKEMASK(2, S_DUART_CHAN_MODE) 126 #define M_DUART_MISC_CMD _SB_MAKEMASK(3, S_DUART_MISC_CMD) 171 #define M_DUART_CLK_COUNTER _SB_MAKEMASK(12, 0) 182 #define M_DUART_RX_DATA _SB_MAKEMASK(8, 0) 183 #define M_DUART_TX_DATA _SB_MAKEMASK(8, 0) 205 #define M_DUART_IN_PIN_VAL _SB_MAKEMASK(4, S_DUART_IN_PIN_VAL) 208 #define M_DUART_IN_PIN_CHNG _SB_MAKEMASK( [all...] |
H A D | sb1250_mc.h | 43 #define M_MC_RESERVED0 _SB_MAKEMASK(8, S_MC_RESERVED0) 46 #define M_MC_CHANNEL_SEL _SB_MAKEMASK(8, S_MC_CHANNEL_SEL) 51 #define M_MC_BANK0_MAP _SB_MAKEMASK(4, S_MC_BANK0_MAP) 59 #define M_MC_BANK1_MAP _SB_MAKEMASK(4, S_MC_BANK1_MAP) 67 #define M_MC_BANK2_MAP _SB_MAKEMASK(4, S_MC_BANK2_MAP) 75 #define M_MC_BANK3_MAP _SB_MAKEMASK(4, S_MC_BANK3_MAP) 82 #define M_MC_RESERVED1 _SB_MAKEMASK(8, 32) 85 #define M_MC_QUEUE_SIZE _SB_MAKEMASK(4, S_MC_QUEUE_SIZE) 91 #define M_MC_AGE_LIMIT _SB_MAKEMASK(4, S_MC_AGE_LIMIT) 97 #define M_MC_WR_LIMIT _SB_MAKEMASK( [all...] |
H A D | sb1250_scd.h | 45 #define M_SYS_RESERVED _SB_MAKEMASK(8, 0) 48 #define M_SYS_REVISION _SB_MAKEMASK(8, S_SYS_REVISION) 96 #define M_SYS_L2C_SIZE _SB_MAKEMASK(4, S_SYS_L2C_SIZE) 112 #define M_SYS_NUM_CPUS _SB_MAKEMASK(4, S_SYS_NUM_CPUS) 118 #define M_SYS_PART _SB_MAKEMASK(16, S_SYS_PART) 131 #define M_SYS_SOC_TYPE _SB_MAKEMASK(4, S_SYS_SOC_TYPE) 170 #define M_SYS_WID _SB_MAKEMASK(32, S_SYS_WID) 182 #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32, S_SYS_WAFERID1_200) 187 #define M_SYS_BIN _SB_MAKEMASK(4, S_SYS_BIN) 193 #define M_SYS_WAFERID2_200 _SB_MAKEMASK( [all...] |
H A D | sb1250_genbus.h | 50 #define M_IO_WIDTH_SEL _SB_MAKEMASK(2, S_IO_WIDTH_SEL) 74 #define M_IO_TIMEOUT _SB_MAKEMASK(8, S_IO_TIMEOUT) 83 #define M_IO_MULT_SIZE _SB_MAKEMASK(12, S_IO_MULT_SIZE) 94 #define M_IO_START_ADDR _SB_MAKEMASK(14, S_IO_START_ADDR) 108 #define M_IO_ALE_WIDTH _SB_MAKEMASK(3, S_IO_ALE_WIDTH) 118 #define M_IO_ALE_TO_CS _SB_MAKEMASK(2, S_IO_ALE_TO_CS) 125 #define M_IO_BURST_WIDTH _SB_MAKEMASK(2, S_IO_BURST_WIDTH) 131 #define M_IO_CS_WIDTH _SB_MAKEMASK(5, S_IO_CS_WIDTH) 136 #define M_IO_RDY_SMPLE _SB_MAKEMASK(3, S_IO_RDY_SMPLE) 146 #define M_IO_ALE_TO_WRITE _SB_MAKEMASK( [all...] |
H A D | bcm1480_mc.h | 43 #define M_BCM1480_MC_INTLV0 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV0) 49 #define M_BCM1480_MC_INTLV1 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV1) 55 #define M_BCM1480_MC_INTLV2 _SB_MAKEMASK(6, S_BCM1480_MC_INTLV2) 61 #define M_BCM1480_MC_CS_MODE _SB_MAKEMASK(8, S_BCM1480_MC_CS_MODE) 84 #define M_BCM1480_MC_CS0_START _SB_MAKEMASK(12, S_BCM1480_MC_CS0_START) 89 #define M_BCM1480_MC_CS1_START _SB_MAKEMASK(12, S_BCM1480_MC_CS1_START) 94 #define M_BCM1480_MC_CS2_START _SB_MAKEMASK(12, S_BCM1480_MC_CS2_START) 99 #define M_BCM1480_MC_CS3_START _SB_MAKEMASK(12, S_BCM1480_MC_CS3_START) 108 #define M_BCM1480_MC_CS0_END _SB_MAKEMASK(12, S_BCM1480_MC_CS0_END) 113 #define M_BCM1480_MC_CS1_END _SB_MAKEMASK(1 [all...] |
H A D | sb1250_dma.h | 60 #define M_DMA_DESC_TYPE _SB_MAKEMASK(2, S_DMA_DESC_TYPE) 80 #define M_DMA_INT_PKTCNT _SB_MAKEMASK(8, S_DMA_INT_PKTCNT) 85 #define M_DMA_RINGSZ _SB_MAKEMASK(16, S_DMA_RINGSZ) 90 #define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16, S_DMA_HIGH_WATERMARK) 95 #define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16, S_DMA_LOW_WATERMARK) 121 #define M_DMA_MBZ1 _SB_MAKEMASK(6, 15) 124 #define M_DMA_HDR_SIZE _SB_MAKEMASK(9, S_DMA_HDR_SIZE) 128 #define M_DMA_MBZ2 _SB_MAKEMASK(5, 32) 131 #define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9, S_DMA_ASICXFR_SIZE) 136 #define M_DMA_INT_TIMEOUT _SB_MAKEMASK(1 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/src/ |
H A D | diag_l1cache.h | 72 #define DTAGLO_PTAG1_MASK _SB_MAKEMASK(14,DTAGLO_PTAG1_SHIFT) 74 #define DTAGLO_PTAG0_MASK _SB_MAKEMASK(13,DTAGLO_PTAG0_SHIFT) 76 #define DTAGLO_PTAG_MASK _SB_MAKEMASK(27,DTAGLO_PTAG0_SHIFT) 81 #define DTAGHI_STATE_MASK _SB_MAKEMASK(2,DTAGHI_STATE_SHIFT) 84 #define DTAGHI_CHECK_MASK _SB_MAKEMASK(2,DTAGHI_CHECK_SHIFT) 89 #define DTAGHI_LRU_MASK _SB_MAKEMASK(8,DTAGHI_LRU_SHIFT) 99 #define ITAGLO_REGION_MASK _SB_MAKEMASK(2,ITAGLO_REGION_SHIFT) 102 #define ITAGLO_VTAG1_MASK _SB_MAKEMASK(20,ITAGLO_VTAG1_SHIFT) 105 #define ITAGLO_VTAG1_MASK _SB_MAKEMASK(19,ITAGLO_VTAG1_SHIFT) 109 #define ITAGLO_VTAG0_MASK _SB_MAKEMASK(1 [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/cfe/cfe/arch/mips/cpu/sb1250/include/ |
H A D | sb1250_dma.h | 96 #define M_DMA_INT_PKTCNT _SB_MAKEMASK(8,S_DMA_INT_PKTCNT) 101 #define M_DMA_RINGSZ _SB_MAKEMASK(16,S_DMA_RINGSZ) 106 #define M_DMA_HIGH_WATERMARK _SB_MAKEMASK(16,S_DMA_HIGH_WATERMARK) 111 #define M_DMA_LOW_WATERMARK _SB_MAKEMASK(16,S_DMA_LOW_WATERMARK) 136 #define M_DMA_MBZ1 _SB_MAKEMASK(6,15) 139 #define M_DMA_HDR_SIZE _SB_MAKEMASK(9,S_DMA_HDR_SIZE) 143 #define M_DMA_MBZ2 _SB_MAKEMASK(5,32) 146 #define M_DMA_ASICXFR_SIZE _SB_MAKEMASK(9,S_DMA_ASICXFR_SIZE) 151 #define M_DMA_INT_TIMEOUT _SB_MAKEMASK(16,S_DMA_INT_TIMEOUT) 159 #define M_DMA_DSCRBASE_MBZ _SB_MAKEMASK( [all...] |
H A D | sb1250_l2c.h | 61 #define M_L2C_TAG_MBZ _SB_MAKEMASK(5,S_L2C_TAG_MBZ) 64 #define M_L2C_TAG_INDEX _SB_MAKEMASK(12,S_L2C_TAG_INDEX) 69 #define M_L2C_TAG_TAG _SB_MAKEMASK(23,S_L2C_TAG_TAG) 74 #define M_L2C_TAG_ECC _SB_MAKEMASK(6,S_L2C_TAG_ECC) 79 #define M_L2C_TAG_WAY _SB_MAKEMASK(2,S_L2C_TAG_WAY) 91 #define M_L2C_MGMT_INDEX _SB_MAKEMASK(12,S_L2C_MGMT_INDEX) 96 #define M_L2C_MGMT_QUADRANT _SB_MAKEMASK(2,S_L2C_MGMT_QUADRANT) 101 #define M_L2C_MGMT_HALF _SB_MAKEMASK(1,S_L2C_MGMT_HALF) 104 #define M_L2C_MGMT_WAY _SB_MAKEMASK(2,S_L2C_MGMT_WAY) 109 #define M_L2C_MGMT_TAG _SB_MAKEMASK( [all...] |
H A D | sb1250_genbus.h | 67 #define M_IO_WIDTH_SEL _SB_MAKEMASK(2,S_IO_WIDTH_SEL) 89 #define M_IO_TIMEOUT _SB_MAKEMASK(8,S_IO_TIMEOUT) 98 #define M_IO_MULT_SIZE _SB_MAKEMASK(12,S_IO_MULT_SIZE) 109 #define M_IO_START_ADDR _SB_MAKEMASK(14,S_IO_START_ADDR) 120 #define M_IO_ALE_WIDTH _SB_MAKEMASK(3,S_IO_ALE_WIDTH) 129 #define M_IO_ALE_TO_CS _SB_MAKEMASK(2,S_IO_ALE_TO_CS) 135 #define M_IO_BURST_WIDTH _SB_MAKEMASK(2,S_IO_BURST_WIDTH) 141 #define M_IO_CS_WIDTH _SB_MAKEMASK(5,S_IO_CS_WIDTH) 146 #define M_IO_RDY_SMPLE _SB_MAKEMASK(3,S_IO_RDY_SMPLE) 156 #define M_IO_ALE_TO_WRITE _SB_MAKEMASK( [all...] |
H A D | sb1250_mc.h | 61 #define M_MC_RESERVED0 _SB_MAKEMASK(8,S_MC_RESERVED0) 64 #define M_MC_CHANNEL_SEL _SB_MAKEMASK(8,S_MC_CHANNEL_SEL) 69 #define M_MC_BANK0_MAP _SB_MAKEMASK(4,S_MC_BANK0_MAP) 77 #define M_MC_BANK1_MAP _SB_MAKEMASK(4,S_MC_BANK1_MAP) 85 #define M_MC_BANK2_MAP _SB_MAKEMASK(4,S_MC_BANK2_MAP) 93 #define M_MC_BANK3_MAP _SB_MAKEMASK(4,S_MC_BANK3_MAP) 100 #define M_MC_RESERVED1 _SB_MAKEMASK(8,32) 103 #define M_MC_QUEUE_SIZE _SB_MAKEMASK(4,S_MC_QUEUE_SIZE) 109 #define M_MC_AGE_LIMIT _SB_MAKEMASK(4,S_MC_AGE_LIMIT) 115 #define M_MC_WR_LIMIT _SB_MAKEMASK( [all...] |
H A D | sb1250_uart.h | 67 #define M_DUART_BITS_PER_CHAR _SB_MAKEMASK(2,S_DUART_BITS_PER_CHAR) 85 #define M_DUART_PARITY_MODE _SB_MAKEMASK(2,S_DUART_PARITY_MODE) 109 #define M_DUART_MODE_RESERVED1 _SB_MAKEMASK(3,0) /* ignored */ 120 #define M_DUART_CHAN_MODE _SB_MAKEMASK(2,S_DUART_CHAN_MODE) 143 #define M_DUART_MISC_CMD _SB_MAKEMASK(3,S_DUART_MISC_CMD) 188 #define M_DUART_CLK_COUNTER _SB_MAKEMASK(12,0) 199 #define M_DUART_RX_DATA _SB_MAKEMASK(8,0) 200 #define M_DUART_TX_DATA _SB_MAKEMASK(8,0) 222 #define M_DUART_IN_PIN_VAL _SB_MAKEMASK(4,S_DUART_IN_PIN_VAL) 225 #define M_DUART_IN_PIN_CHNG _SB_MAKEMASK( [all...] |
H A D | sb1250_scd.h | 63 #define M_SYS_RESERVED _SB_MAKEMASK(8,0) 66 #define M_SYS_REVISION _SB_MAKEMASK(8,S_SYS_REVISION) 90 #define M_SYS_PART _SB_MAKEMASK(16,S_SYS_PART) 101 #define M_SYS_SOC_TYPE _SB_MAKEMASK(4,S_SYS_SOC_TYPE) 138 #define M_SYS_WID _SB_MAKEMASK(32,S_SYS_WID) 148 #define M_SYS_WAFERID1_200 _SB_MAKEMASK(32,S_SYS_WAFERID1_200) 153 #define M_SYS_BIN _SB_MAKEMASK(4,S_SYS_BIN) 159 #define M_SYS_WAFERID2_200 _SB_MAKEMASK(4,S_SYS_WAFERID2_200) 165 #define M_SYS_WAFERID_300 _SB_MAKEMASK(40,S_SYS_WAFERID_300) 170 #define M_SYS_XPOS _SB_MAKEMASK( [all...] |
H A D | sb1250_smbus.h | 61 #define M_SMB_FREQ_DIV _SB_MAKEMASK(13,S_SMB_FREQ_DIV) 68 #define M_SMB_CMD _SB_MAKEMASK(8,S_SMB_CMD) 98 #define M_SMB_ADDR _SB_MAKEMASK(7,S_SMB_ADDR) 105 #define M_SMB_TT _SB_MAKEMASK(3,S_SMB_TT) 134 #define M_SMB_LB _SB_MAKEMASK(8,S_SMB_LB) 138 #define M_SMB_MB _SB_MAKEMASK(8,S_SMB_MB) 147 #define M_SPEC_PEC _SB_MAKEMASK(8,S_SPEC_PEC) 154 #define M_SMB_CMDH _SB_MAKEMASK(8,S_SMBH_CMD) 162 #define M_SMB_DFMT _SB_MAKEMASK(3,S_SMB_DFMT)
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