Searched refs:VT1724_MULTI_FIFO_ERR (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/sound/pci/ice1712/
H A Denvy24ht.h137 #define VT1724_MULTI_FIFO_ERR 0x08 /* DMA FIFO underrun/overrun. */ macro
H A Dice1724.c508 if (mtstat & VT1724_MULTI_FIFO_ERR) {
511 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
2289 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/sound/pci/ice1712/
H A Denvy24ht.h137 #define VT1724_MULTI_FIFO_ERR 0x08 /* DMA FIFO underrun/overrun. */ macro
H A Dice1724.c508 if (mtstat & VT1724_MULTI_FIFO_ERR) {
511 outb(VT1724_MULTI_FIFO_ERR | inb(ICEMT1724(ice, DMA_INT_MASK)), ICEMT1724(ice, DMA_INT_MASK));
2289 outb(VT1724_MULTI_FIFO_ERR, ICEMT1724(ice, DMA_INT_MASK));

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