Searched refs:VCLKCR2 (Results 1 - 6 of 6) sorted by relevance
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-shmobile/ |
H A D | clock-sh7367.c | 31 #define VCLKCR2 0xe615000C macro 213 [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
|
H A D | clock-sh7377.c | 31 #define VCLKCR2 0xe615000C macro 215 [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
|
H A D | clock-sh7372.c | 32 #define VCLKCR2 0xe615000c macro 366 [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
|
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-shmobile/ |
H A D | clock-sh7367.c | 31 #define VCLKCR2 0xe615000C macro 213 [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
|
H A D | clock-sh7377.c | 31 #define VCLKCR2 0xe615000C macro 215 [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
|
H A D | clock-sh7372.c | 32 #define VCLKCR2 0xe615000c macro 366 [DIV6_VCK2] = SH_CLK_DIV6(&pllc1_div2_clk, VCLKCR2, 0),
|
Completed in 79 milliseconds