/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt/router/gdb/sim/m32r/ |
H A D | arch.h | 40 , UNIT_M32R_D_U_MAC, UNIT_M32R_D_U_CMP, UNIT_M32R_D_U_EXEC, UNIT_TEST_U_EXEC enumerator in enum:unit_type
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H A D | model.c | 4053 { M32RBF_INSN_X_INVALID, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4054 { M32RBF_INSN_X_AFTER, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4055 { M32RBF_INSN_X_BEFORE, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4056 { M32RBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4057 { M32RBF_INSN_X_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4058 { M32RBF_INSN_X_BEGIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4059 { M32RBF_INSN_ADD, model_m32r_d_add, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4060 { M32RBF_INSN_ADD3, model_m32r_d_add3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4061 { M32RBF_INSN_AND, model_m32r_d_and, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4062 { M32RBF_INSN_AND3, model_m32r_d_and3, { { (int) UNIT_M32R_D_U_EXEC, [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src/router/gdb/sim/m32r/ |
H A D | arch.h | 40 , UNIT_M32R_D_U_MAC, UNIT_M32R_D_U_CMP, UNIT_M32R_D_U_EXEC, UNIT_TEST_U_EXEC enumerator in enum:unit_type
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H A D | model.c | 4053 { M32RBF_INSN_X_INVALID, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4054 { M32RBF_INSN_X_AFTER, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4055 { M32RBF_INSN_X_BEFORE, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4056 { M32RBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4057 { M32RBF_INSN_X_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4058 { M32RBF_INSN_X_BEGIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4059 { M32RBF_INSN_ADD, model_m32r_d_add, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4060 { M32RBF_INSN_ADD3, model_m32r_d_add3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4061 { M32RBF_INSN_AND, model_m32r_d_and, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4062 { M32RBF_INSN_AND3, model_m32r_d_and3, { { (int) UNIT_M32R_D_U_EXEC, [all...] |
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/router/gdb/sim/m32r/ |
H A D | arch.h | 40 , UNIT_M32R_D_U_MAC, UNIT_M32R_D_U_CMP, UNIT_M32R_D_U_EXEC, UNIT_TEST_U_EXEC enumerator in enum:unit_type
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H A D | model.c | 4053 { M32RBF_INSN_X_INVALID, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4054 { M32RBF_INSN_X_AFTER, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4055 { M32RBF_INSN_X_BEFORE, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4056 { M32RBF_INSN_X_CTI_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4057 { M32RBF_INSN_X_CHAIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4058 { M32RBF_INSN_X_BEGIN, 0, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4059 { M32RBF_INSN_ADD, model_m32r_d_add, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4060 { M32RBF_INSN_ADD3, model_m32r_d_add3, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4061 { M32RBF_INSN_AND, model_m32r_d_and, { { (int) UNIT_M32R_D_U_EXEC, 1, 1 } } }, 4062 { M32RBF_INSN_AND3, model_m32r_d_and3, { { (int) UNIT_M32R_D_U_EXEC, [all...] |