Searched refs:ULPD_REG_BASE (Results 1 - 2 of 2) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/plat-omap/include/plat/
H A Dhardware.h103 #define ULPD_REG_BASE (0xfffe0800) macro
104 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
105 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
106 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
109 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
113 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
114 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
115 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
116 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
117 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE
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/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/plat-omap/include/plat/
H A Dhardware.h103 #define ULPD_REG_BASE (0xfffe0800) macro
104 #define ULPD_IT_STATUS (ULPD_REG_BASE + 0x14)
105 #define ULPD_SETUP_ANALOG_CELL_3 (ULPD_REG_BASE + 0x24)
106 #define ULPD_CLOCK_CTRL (ULPD_REG_BASE + 0x30)
109 #define ULPD_SOFT_REQ (ULPD_REG_BASE + 0x34)
113 #define ULPD_DPLL_CTRL (ULPD_REG_BASE + 0x3c)
114 #define ULPD_STATUS_REQ (ULPD_REG_BASE + 0x40)
115 #define ULPD_APLL_CTRL (ULPD_REG_BASE + 0x4c)
116 #define ULPD_POWER_CTRL (ULPD_REG_BASE + 0x50)
117 #define ULPD_SOFT_DISABLE_REQ_REG (ULPD_REG_BASE
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