Searched refs:U8500_PRCMU_BASE (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ux500/
H A Dcpu-db8500.c40 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
H A Dclock.c247 void __iomem *cg_set_reg = __io_address(U8500_PRCMU_BASE)
255 void __iomem *cg_clr_reg = __io_address(U8500_PRCMU_BASE)
264 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
272 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ux500/
H A Dcpu-db8500.c40 __IO_DEV_DESC(U8500_PRCMU_BASE, SZ_4K),
H A Dclock.c247 void __iomem *cg_set_reg = __io_address(U8500_PRCMU_BASE)
255 void __iomem *cg_clr_reg = __io_address(U8500_PRCMU_BASE)
264 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
272 void __iomem *addr = __io_address(U8500_PRCMU_BASE)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ux500/include/mach/
H A Ddb8500-regs.h96 #define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ux500/include/mach/
H A Ddb8500-regs.h96 #define U8500_PRCMU_BASE (U8500_PER4_BASE + 0x07000) macro

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