Searched refs:U8500_GPIO1_BASE (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ux500/include/mach/
H A Ddb8500-regs.h59 #define U8500_GPIO1_BASE (U8500_PER3_BASE + 0xE000) macro
139 #define U8500_GPIOBANK2_BASE U8500_GPIO1_BASE
140 #define U8500_GPIOBANK3_BASE (U8500_GPIO1_BASE + 0x80)
141 #define U8500_GPIOBANK4_BASE (U8500_GPIO1_BASE + 0x100)
142 #define U8500_GPIOBANK5_BASE (U8500_GPIO1_BASE + 0x180)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ux500/include/mach/
H A Ddb8500-regs.h59 #define U8500_GPIO1_BASE (U8500_PER3_BASE + 0xE000) macro
139 #define U8500_GPIOBANK2_BASE U8500_GPIO1_BASE
140 #define U8500_GPIOBANK3_BASE (U8500_GPIO1_BASE + 0x80)
141 #define U8500_GPIOBANK4_BASE (U8500_GPIO1_BASE + 0x100)
142 #define U8500_GPIOBANK5_BASE (U8500_GPIO1_BASE + 0x180)
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-ux500/
H A Dcpu-db8500.c42 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-ux500/
H A Dcpu-db8500.c42 __IO_DEV_DESC(U8500_GPIO1_BASE, SZ_4K),

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