Searched refs:U300_SYSCON_CSR (Results 1 - 6 of 6) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-u300/include/mach/
H A Dsyscon.h34 #define U300_SYSCON_CSR (0x0004) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-u300/include/mach/
H A Dsyscon.h34 #define U300_SYSCON_CSR (0x0004) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-u300/
H A Dclock.c1473 while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
H A Dcore.c1642 while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-u300/
H A Dclock.c1473 while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &
H A Dcore.c1642 while (!(readw(U300_SYSCON_VBASE + U300_SYSCON_CSR) &

Completed in 118 milliseconds