Searched refs:U300_SYSCON_CEFR (Results 1 - 4 of 4) sorted by relevance

/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-u300/
H A Dclock.c232 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
234 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
250 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
252 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
270 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
272 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
290 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
292 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-u300/
H A Dclock.c232 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
234 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
250 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
252 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
270 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
272 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
290 val = readw(U300_SYSCON_VBASE + U300_SYSCON_CEFR);
292 writew(val, U300_SYSCON_VBASE + U300_SYSCON_CEFR);
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/mach-u300/include/mach/
H A Dsyscon.h94 #define U300_SYSCON_CEFR (0x0024) macro
/asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/mach-u300/include/mach/
H A Dsyscon.h94 #define U300_SYSCON_CEFR (0x0024) macro

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